C

Cadence Design Systems

Develops EDA software, IP, verification tools

Application Engineer - Digital implementation

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeYokohama, Kanagawa, JapanNo salary listedIn-person

About the Job

Requirements

  • Ability to understand and articulate technical issues, and knowledge of design products and their applications.
  • Working knowledge of one or more programming languages.
  • Good communication in English.
  • Familiarity with shell, Perl, Tcl, or Python scripting languages.

Responsibilities

  • Provide key technical support in digital IC design implementation, product demonstration, and sales presentations.
  • Demonstrate hands-on ability with RTL-to-GDSII design methodology, including challenging low-power and high-performance designs.
  • Bring real design experience including floorplanning and partitioning, placement, clock tree synthesis, routing, static timing analysis timing closure, physical verification, RC extraction, and power network analysis.
  • Assist in technical evaluation, assessment, and delivery of concurrent mixed-signal design.

Desired Qualifications

  • An MS degree.
  • Working experience in a multinational IC design house or familiarity with EDI/Innovus products.
  • Knowledge of machine learning or artificial intelligence.
  • Synthesis experience.

About the Company

Cadence Design Systems

Develops EDA software, IP, verification tools

Cadence Design Systems supplies software, hardware, and IP for electronic design automation (EDA) to help customers create advanced semiconductor chips and electronic systems. Its tools handle system design, verification, digital and analog IC design, and custom flows, while IP such as Tensilica processors and DSP cores can be licensed for integration into customer products. The offerings are delivered as software licenses with maintenance and support, plus IP licensing and occasional hardware-accelerated options. The company differentiates itself with a broad, end-to-end EDA portfolio and close collaboration with industry leaders to streamline the path from concept to silicon, aiming to help customers bring sophisticated silicon and electronics to market faster with lower risk and higher productivity.

Company size
10,001+
Company stage
IPO
Headquarters
San Jose, CA
Founded
1988

Recently Posted Jobs

Explore more opportunities at Cadence Design Systems

See more jobs