SOC Verification Graduate Intern

Job Description

The Tesla AI Hardware team is at the forefront of revolutionizing artificial intelligence through cutting-edge hardware innovation. Comprising brilliant engineers and visionaries, the team designs and develops advanced AI inference chips tailored to accelerate Tesla’s machine learning capabilities.

Hardware team powers the neural networks behind Full Self-Driving (FSD), and Tesla humanoid robot, Optimus, pushing the boundaries of computational efficiency and performance. By creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life.

The AI Hardware team is looking for a SOC Verification Graduate Intern who will be responsible for pre-silicon RTL verification of block and top-level SOC. With a strong knowledge of SOC architecture and SOC verification methodologies, you will interact with multiple teams and build a metric-driven, configurable, and flexible verification environment. 

Job Responsibilities

• Work with team members to define and set up a SOC-level verification environment.
• Architect highly reusable UVM based test benches and integrate complex multi-instance VIPs, sub-system test benches, and test suites at the SOC level.
• Work with Design, Architecture, SW, FW and external IP delivery teams to efficiently integrate and verify the design.
• Create coverage driven verification plans from specifications.
• Execute, review, and refine to achieve coverage targets.
• Define and review verification and validation test plans created by other members of the team.
• Assist with Post-silicon validation and SOC bring-up.
• Understand details of High Efficiency SOC - Architecture, standard SOC peripherals and I/O (e.g. DDR, PCIe, USB), DMA, memory management schemes, multi-processor systems, Memory Controller Sub.
• Systems, PLL, power up and Secured Boot schemes.

Job Requirements

• Fresh Graduates are welcome, hands-on DV experience would be a plus.
• Relevant internship experience is a plus.
• Strong programming skills in UVM, C/C++, Python/Perl.
• Experience verifying CPU/GPU integration at the SOC level.
• Coherency verification at the SOC level.
• Emulation experience, working on available platforms such as Palladium, or Zebu.
• Experience in SOC bring-up and post-silicon verification.
• Post-silicon validation and SOC bring-up.
• HW/FW interaction verification.
• Reset and power verification.