Package Development Engineer

Lead the development and qualification of advanced multi-Phase Power Module, DrMOS, and Smart Power Stage (SPS) packages. Responsible for package architecture, substrate design, flip-chip integration, passive component assembly, reliability qualification, and manufacturing readiness. Collaborate closely with Product Engineering, Silicon Design, Reliability, Operations, OSATs, and suppliers to deliver high-performance, cost-effective power packaging solutions.

• BS/MS in Electrical Engineering, Materials Science, Mechanical Engineering, or related field.
• 10+ years of semiconductor package development experience.
• Strong expertise in: 
  • Multi-Phase Power Modules, DrMOS, and SPS packaging
  • Advanced substrate design and manufacturing
  • Flip-chip assembly and package integration
  • Passive component assembly and optimization
  • Thermal management and reliability engineering
  • High-volume manufacturing and NPI processes
• Experience working with OSATs, substrate suppliers, and material vendors.
• Strong communication skills, with the ability to effectively collaborate with Business Units, cross-functional teams, internal and external manufacturing partners, and customers.
• Proficiency in engineering tools and methodologies, including ACAD, 8D, SPC, DFMEA, DOE.
• Proven ability to lead projects across organizations and cultures in a fast-paced environment.

onsemi is excited to share the base salary range for this position is $150,000.00 to $249,780.00. The Range exclusive of fringe benefits or potential bonuses. The final pay rate for the successful candidate will depend on geographic location, skills, education, experience, and/or consideration of internal equity of our current team members. We also offer a competitive benefits package. https://www.onsemi.com/site/pdf/Benefits-Summary-USA.pdf

• Lead package development from concept through production release.
• Define package architecture, materials selection, and assembly process flow.
• Develop and optimize substrate designs including stack-up, routing, power planes, via structures, and thermal features.
• Drive flip-chip integration, bump design, underfill selection, and assembly process optimization.
• Develop passive component integration strategies for capacitors, resistors, and magnetic components.
• Perform electrical, thermal, and mechanical performance optimization.
• Lead package qualification and reliability testing per JEDEC and IPC standards.
• Conduct root cause analysis and implement corrective actions for package failures.
• Collaborate with OSATs and suppliers on DFM, process development, yield improvement, and cost reduction.
• Support NPI execution and transfer technologies into high-volume manufacturing.