PMU Analog Mixed-Signal Design Verification Engineer – Early Career

Summary

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? As a member of our PMU team at our Munich office, you will have the great opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every day! We are looking for an AMS Verification Engineer who will enable us to verify our next generation of PMUs, in close collaboration with the design teams. You will become part of a hands-on development team that cultivates perfection, creativity and innovation. The responsibilities include contributing to the top level verification of our PMUs. A number of IP specific features as well as interaction between IPs will also be part of the expected verification scope.

Minimum Qualifications

Bachelors, Masters or PhD in EE or related field, or equivalent work experience. Excellent communication and interpersonal skills, combined with the ability to collaborate with diverse teams and take on diverse challenges with international teams. Outstanding sense and drive for quality of deliverables. Ability to work well on a team, take ownership and motivate self and others. Verification mindset Fluent English skills.

Preferred Qualifications

Knowledge of mixed signal verification. Knowledge in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code. Familiar with verification methodologies and tools: simulators, waveform viewers. Basic knowledge of power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, clock generators. A background that includes scripting or programming languages is a plus (TCL / Python).

Description

- In this role, you will take care of ensuring high quality silicon for IC chips and IPs. The workflow starts with careful review of specifications followed by crafting of a verification plan. Then the verification is executed according to plan to support tape-out. - Analyse and model analog behavior (Verilog-AMS modeling). - Verify pre-silicon sub-/systems in the top level environment, with main respect to Analog/Mixed Signal macros: regressions, failure debug and tape-out. - Ensure specification compliance and correct functionality of attributes defined in the verification plan. - Develop verification environment, including stimuli, checkers, assertions, and coverage. - Have a collaborative approach to communicate status and results to multiple disciplines. - Sign-off mixed signal designs in preparation for tape-out.