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SambaNova Systems

Enterprise AI platform with hardware stack

Design Verification Engineer – New Grad

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeSan Jose, CA, USAIn-person

About the Job

Requirements

  • A B.S. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Coursework or project experience in digital design and computer architecture.
  • Experience with SystemVerilog or Verilog.
  • Scripting experience in Python, Perl, TCL, or shell.
  • Experience with UVM.
  • Familiarity with constrained-random verification, functional coverage, and assertions.
  • Familiarity with clock domain crossing concepts.

Responsibilities

  • Write and execute verification plans for chip-level control and initialization features.
  • Build SystemVerilog and UVM testbench components, including sequences, checkers, assertions, and functional coverage.
  • Write directed and constrained-random tests to find corner cases.
  • Debug simulation and regression failures with RTL designers.
  • Analyze functional and code coverage and close coverage gaps.

Desired Qualifications

  • An M.S. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Experience using AI tools such as Claude for verification development and debug.
  • Internship experience in design verification.

About the Company

SambaNova Systems

Enterprise AI platform with hardware stack

Generating company summary.

Company size
201-500
Company stage
Series F
Total funding
$2.5B
Headquarters
Palo Alto, CA
Founded
2017

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