Cadence Design Systems

Develops EDA software, IP, verification tools

Lead Design Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours

Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

Proficiency in Verilog coding, register-transfer-level design, and datapath design.
Knowledge of register-transfer-level checks, including linting, Synopsys Design Constraints, and clock-domain crossing checks.
Familiarity with synthesis flows and timing constraints.
Experience writing Verilog testbenches and running simulations.
Familiarity with at least one interface protocol, such as UCIe, PCIe, USB, MIPI D-PHY, or HDMI/Display.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

1. Proficient in Verilog coding and RTL design, data path designs,

2. Knowledge of RTL checks ex- LINT, SDC, CDC

3. Familiar with synthesis flow and timing constraints

4. Experience in writing Verilog testbench and running simulations.

5. Familiar with any of the interface Protocols like UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display

We’re doing work that matters. Help us solve what others can’t.

About the Company

Cadence Design Systems

Develops EDA software, IP, verification tools

Cadence Design Systems supplies software, hardware, and IP for electronic design automation (EDA) to help customers create advanced semiconductor chips and electronic systems. Its tools handle system design, verification, digital and analog IC design, and custom flows, while IP such as Tensilica processors and DSP cores can be licensed for integration into customer products. The offerings are delivered as software licenses with maintenance and support, plus IP licensing and occasional hardware-accelerated options. The company differentiates itself with a broad, end-to-end EDA portfolio and close collaboration with industry leaders to streamline the path from concept to silicon, aiming to help customers bring sophisticated silicon and electronics to market faster with lower risk and higher productivity.

Company size: 10,001+
Company stage: IPO
Headquarters: San Jose, CA
Founded: 1988

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