Design Verification Engineer

Summary

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Minimum Qualifications

Master's degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field. Experience and/or education must include: Basic semiconductor physics. CMOS and/or VLSI Design Computer and Processor Architecture Design verification and functional coverage Developing RTL for digital logic blocks using SystemVerilog, including linting and synthesis readiness. Low-power techniques including clock gating, power gating, and multi-voltage designs Experience in computer architecture specification and performance analysis, including determining initial microarchitecture specification of a design. Object oriented programming, C, C++, System Verilog, Python, Perl, and algorithm Parallel Computer Architecture Test and scripting: Perl, Tcl, shell, Makefile, and Python

Preferred Qualifications

N/A

Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Work with architecture and design teams to review design requirements, develop architectural specifications and check specifications for correctness. Develop system Verilog based golden reference model to mimic the logical behaviors of RTL designs, according to the specification. Develop system Verilog assertions and checkers for testing the RTL design. Develop assembly language or Perl and Python based directed tests and constrained random stimulus for design features. Run test simulations of RTL design using simulator and emulator tools. Debug failures observed in RTL simulations and work with RTL design team on fixing the bugs. Develop coverage constructs; collect coverage from RTL regressions and review code, functional coverage. Involved in the formal verification of our design using jasper formal tool. Develop manual or automated formal checks to better verify the design. Run the checks through formal verification tool and debug any failures observed. Develop Perl and Python scripts for automating different part of the testing environment. Summarize failures from regressions, develop formal connectivity checks, auto file tickets from regression reports. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,149 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.