RTL Verification Engineer
Vertical Compute
RTL Verification Engineer
Vertical Compute
Chiplet-based memory-compute integration for edge AI
About Us : AI compute is hitting a hard physical wall, and memory bottlenecks are throttling the entire industry. Founded in October 2024 and backed by €57M in funding, Vertical Compute is solving this with proprietary Vertical Integrated Memory (VIM™) chiplets, making AI hardware faster, greener, and vastly more scalable. We are an interdisciplinary team transforming breakthrough semiconductor physics into commercial reality.
Why Now : After 18 months of intensive R&D, Vertical Compute has reached a critical inflection point. Our underlying technology is validated, and we have successfully met our core technical milestones. Armed with a proven technical data package and ongoing system studies, we are now shifting from pure R&D to active engagement with global enterprise customers. As we prepare for our next phase of scale and growth starting in 2027, joining us today means taking direct ownership of the hardware foundation that will power the next era of AI compute.
About the role:
We are looking for an RTL Verification Engineer to lead and execute the verification of our Vertical Compute's 3D-integrated chiplets. In this role, you will specifically focus on the top-level verification of the chiplets. Coupling high-performance AI accelerators directly with our proprietary Vertical Integrated Memory (VIM™), these chiplets showcase the full capabilities of our technology to address the AI market.
Key Responsibilities:
Lead top-level functional verification for our next-generation AI compute chiplet, ensuring complete protocol compliance and robust multi-die integration.
Architect, deploy, and maintain advanced UVM/SystemVerilog testbenches, assertions, and constrained-random test plans for memory and compute subsystems.
Drive coverage-driven verification, target debug, and root-cause analysis across complex hardware-software boundary scenarios.
Collaborate closely with Front-End RTL Design, System Architecture, and Software/Compiler teams to achieve full tape-out readiness and post-silicon validation.
Benchmark and analyze system-level performance to demonstrate the throughput, bandwidth, and energy efficiency of Vertical Compute's VIM™ technology.
About the team:
This role is part of the Hardware Design team within Vertical Compute's Product & System organization, reporting directly to the HW Team Manager. You will work in close collaboration with the Front-End Design and Software teams, partnering across cross-functional engineering groups to ensure the seamless functionality, performance, and successful delivery of our vertical compute products.
Chiplet-based memory-compute integration for edge AI
Vertical Compute develops chiplet-based technology that vertically integrates memory and compute to address the AI memory wall. It stacks high-aspect-ratio vertical data lanes above compute units, so data moves over nanometres instead of across long traces, improving energy use, density, and performance for AI at the edge. The company differentiates itself by co-designing memory and compute in a vertical chiplet stack to achieve higher density and lower data-transfer energy than traditional DRAM approaches, with a focus on privacy-preserving edge AI. Its goal is to move from seed funding to commercialization by building its engineering team and bringing its vertical memory-compute technology to market.
Explore more opportunities at Vertical Compute