Analog Design Intern
Kandou AI
Analog Design Intern
Kandou AI
Provides chip-to-chip AI connectivity solutions
Kandou is redefining AI infrastructure through innovative interconnect technologies that significantly reduce power consumption while maintaining high bandwidth and ultra-low latency. Our mission is to make AI systems more scalable, efficient, and accessible.
Today we have one internship position available for max 6 months, in our Advanced R&D, for MSc students in the following area :
Analog Design Intern
Please note: This internship is intended for students who are currently enrolled at a university or higher education institution in Switzerland and already based in Switzerland.
Internship Background
Modern computing systems increasingly rely on high-speed serial interfaces to transfer large volumes of data between processors, memory devices, and accelerator chips. Simultaneous bidirectional (SBD) signalling enables both ends of a copper channel to transmit and receive data concurrently over the same physical medium, offering a promising path toward higher bandwidth efficiency without increasing the number of interconnects.
Project Objectives
The objective of this internship is to investigate circuit and signal-processing techniques that enable simultaneous bidirectional communication over wideband copper serial links. The student will explore methods for separating the locally transmitted signal from the incoming signal while maintaining high data rates and robust link performance.
Specific goals may include:
Reviewing the state of the art in simultaneous bidirectional and full-duplex wireline communication systems;
Developing behavioural models of wideband copper channels and transceiver architectures;
Studying self-interference cancellation techniques in the analog and/or digital domains;
Evaluating the impact of channel impairments, mismatch, and non-idealities on link performance;
Designing and simulating key building blocks using Python or circuit-level CAD tools;
Assessing achievable data rates, energy efficiency, and implementation complexity.
Expected Outcomes
At the end of the internship, the student is expected to:
Gain hands-on experience in the design and analysis of high-speed wireline communication systems;
Develop simulation models for simultaneous bidirectional serial links;
Quantify the benefits and challenges associated with full-duplex operation over copper channels;
Present the obtained results in a technical report and oral presentation.
Depending on the progress and interests of the student, the work may lead to conference or journal publication opportunities.
Desired Background
The project is suitable for motivated Master's students in Electrical Engineering, Microelectronics, Communications Engineering, or Computer Engineering.
Preferred qualifications:
Good level of familiarity with analog IC design and layout drawing;
Familiar with analog circuit simulators (SPICE/SPECTRE);
Strong background in signal processing;
Strong communication and presentation skills.
If you recognize yourself in the description above, and love to be part of a growing Company, are a good team player with an upbeat approach to life, we would love to hear from you. Together We Kandou It!
Kandou AI designs and sells semiconductor connectivity hardware for AI workloads. It provides a memory fabric and CXL controllers that link processors to memory, enabling scalable, energy-efficient AI inference and training clusters built from affordable hardware. Using Copper MIMO interconnect, it reduces energy per bit and supports features like offloading AI training collectives, switchless memory for in-memory databases, and field-repairable co-packaged optics for better cooling. By targeting the data-movement bottleneck between processors and memory and offering chiplet-based fabrics and IP licensing, Kandou AI aims to make scalable AI infrastructure more accessible to hyperscalers, data centers, and system integrators.
Explore more opportunities at Kandou AI