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Anthropic

Builds Claude AI models with a focus on safety

Silicon Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeSan Francisco, CA, USA$320k - $485k /yr

About the Job

Requirements

  • Deep, hands-on expertise in at least one silicon domain: front-end design, pre-silicon verification, physical design, design for test, analog and mixed-signal, technology and foundry, design infrastructure, or packaging and signal/power integrity.
  • Direct personal contribution to silicon that taped out and shipped, with ownership that can be explained in detail.
  • Working fluency in adjacent domains sufficient to reason about chip-level tradeoffs outside the candidate's specialty.
  • Experience working with external partners such as ASIC houses, IP vendors, foundries, or test partners, including reviewing their work and holding a technical bar.
  • A track record of owning directional technical decisions and their consequences, not only making recommendations.
  • Practical experience using AI coding tools in one's own work, and clear ideas about where they help and where they do not.
  • Clear written and verbal communication, and experience driving alignment across teams and organizations.
  • Comfort operating with high autonomy and little scaffolding on a highly dynamic program.
  • A bachelor's degree or an equivalent combination of education, training, and/or experience; a relevant field of study may be demonstrated through coursework, training, or professional experience.

Responsibilities

  • Take part in end-to-end activities for the program, including strategy, specification, execution, and setting the technical bar.
  • Write specifications and interface definitions that others design against, and keep them coherent as the architecture converges.
  • Make and own directional calls on technology and IP selection, what to build versus buy versus license, and where to take design authority versus rely on partners.
  • Build and share AI-assisted approaches to code-like parts of the candidate's domain, and help the team assess what Claude can accelerate.
  • Contribute to architecture and micro-architecture discussions from the candidate's domain perspective, including tradeoffs the area imposes on the rest of the chip.
  • Partner with inference, performance, kernels, and infrastructure teams on hardware-software co-design, and with the hardware systems team on bring-up and integration.
  • Support first-silicon bring-up and debugging when it arrives, regardless of the candidate's domain.
  • Write specifications for compute datapaths and defend numeric-format strategies against alternatives.
  • Stand up front-end flows and release management, then hand releases to an ASIC partner on a fixed cadence.
  • Run in-house place-and-route loops on critical blocks and feed power, performance, and area (PPA) findings back into architecture.
  • Select and qualify PHY intellectual property, then validate it on first silicon.
  • Build formal verification methodologies for new blocks and decide where formal verification is useful versus simulation.
  • Define test strategies and automated test equipment handoff interfaces with partners.
  • Prototype Claude-assisted workflows for register-transfer-level (RTL) review, coverage triage, or specification consistency checking, and report what they did and did not accomplish.
  • Debug first-silicon failures that cross the candidate's domain and another domain.

Desired Qualifications

  • Experience on machine-learning accelerators, high-performance computing, or other large, high-bandwidth designs.
  • Experience on a founding or early-stage silicon team, including establishing flows, methodology, or tooling from scratch.
  • Experience with both partner-executed and fully in-house programs, and a perspective on their tradeoffs.
  • Familiarity with the chip-package-system interface and the tradeoffs that cross it.
  • Experience with hardware-software co-design and working directly with compiler, kernel, or runtime teams.
  • Experience building or extending AI-assisted design, verification, or physical-design flows.
  • Depth in memory subsystems, on-die interconnect, numerics, or low-power design.

About the Company

Anthropic

Builds Claude AI models with a focus on safety

Anthropic builds the Claude family of AI models and sells them to businesses, software developers, and consumers, with research on making AI safe and understandable at the center of its work. In 2024 it introduced the Model Context Protocol, an open standard for connecting AI assistants to outside apps and data that OpenAI and Google adopted the next year. People use the Claude app to write and analyze files, programmers hand coding tasks to Claude Code, and companies build Claude into their own products through its API. Anthropic earns money from subscriptions, business plans, and usage-based API fees. Siblings Dario and Daniela Amodei founded Anthropic in 2021 with other former OpenAI employees, and it is based in San Francisco.

Company size
5,001-10,000
Company stage
N/A
Total funding
$243.8B
Headquarters
San Francisco, CA
Founded
2021

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