Q

Qualcomm

Designs mobile chips and licenses wireless patents

SOC Debug Engineer - ASICS Engineering

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeSan Diego, CA, USAIn-person

About the Job

Requirements

  • A bachelor's degree in Science, Engineering, or a related field and 4 or more years of ASIC design, verification, validation, integration, or related work experience; or a master's degree in Science, Engineering, or a related field and 3 or more years of such experience; or a PhD in Science, Engineering, or a related field and 2 or more years of such experience.
  • A bachelor's degree in Engineering, Information Systems, Computer Science, or a related field and 4 or more years of Systems Engineering or related work experience; or a master's degree in Engineering, Information Systems, Computer Science, or a related field and 3 or more years of such experience; or a PhD in these fields or a related field and 2 or more years of such experience.
  • Experience in ARM and RISC-V application processor architecture.
  • Strong foundation in silicon design principles and architectural trade-offs.
  • Ability to span and connect levels of abstraction across system design, high-level languages, operating systems, hardware/software interfaces, microarchitecture, and silicon implementation.
  • Background in architecture (IP or SoC) and/or front-end design or verification (microarchitecture).
  • Demonstrated deep technical knowledge and achievements at the SoC, subsystem, or large IP levels as a microarchitect or architect.
  • Ability to apply appropriate abstractions and quantitative analysis to define problems and solutions.
  • Experience using, improving, and developing tools for analysis and modeling, such as functional and performance simulators and profilers.
  • Programming ability for modeling and automation, with experience in software-development best practices including reviews, unit testing, and version control.
  • Ability and desire to develop and improve architecture methodologies for experiments and analysis.
  • Bachelor's degree in Electronic Engineering, Computer Science, or a related field; master's degree or PhD is highly desired.
  • Five or more years of SoC/IP architecture or microarchitecture/front-end design experience.
  • Candidates with primarily a microarchitecture or design background must have contributions demonstrating higher-level analysis and design.

Responsibilities

  • Create highly scalable SoC architecture, with expertise in SoC control, boot, reset, timebase management, debug, microcontrollers, and related areas.
  • Understand product requirements to guide the development of appropriate architecture.
  • Perform trade-off analysis in the solution space to produce an optimal architecture.
  • Collaborate with architects, technical leads, and hardware and software engineers across functional areas to derive architectural solutions that integrate into the overall SoC.
  • Generate detailed architectural specifications and work closely with the design team to implement the architecture.

Desired Qualifications

  • Experience with SoC areas such as boot, timebase management and network, security architecture, reset architecture and debug architecture, and system-level control or management components such as BMC and ECU.
  • Experience with SoC architectures including heterogeneous compute, NoC/interconnect, memory systems, multicore, multi-die, cache hierarchies, shared memory, I/O, coherency, compression, and security.
  • Experience with resource and power management.
  • Experience with security architecture.
  • Experience with system-level debug.
  • Experience with safety, reliability, and high-resilience or high-availability systems.
  • Experience with AI and machine learning.
  • Experience with control and real-time systems.
  • Experience with high-level operating systems such as Android, Linux, and Windows.
  • Experience with real-time operating systems such as Zephyr and FreeRTOS.
  • Experience with front-end digital hardware design or verification.
  • Experience with Arm system architectures such as Cortex-A, Cortex-R, Cortex-M, and CoreSight.
  • Experience with high-speed I/O such as USB, PCIe, and CXL.
  • Experience with external memory and storage architectures such as LPDDR, NAND Flash, and NOR Flash.
  • Experience with networking and connectivity such as Ethernet, WLAN, cellular, and CAN.
  • Experience with behavioral, functional, and performance modeling.
  • Experience optimizing power and/or performance through simulation and modeling.
  • Experience with simulator architectures and frameworks, preferably C++- or Python-based.
  • Experience with analytical modeling for performance and power.
  • Proficiency in C++ and Python is preferred.

About the Company

Qualcomm

Designs mobile chips and licenses wireless patents

Qualcomm designs the Snapdragon processors and modems inside many Android phones, and it licenses its wireless patents to device makers around the world. It helped commercialize CDMA, the cellular technology behind 3G networks, and its patents cover core parts of the 4G and 5G standards that phones use to connect. The company does not run its own chip factories; contract foundries make its chips, which it sells to makers of phones, PCs, cars, and connected devices. Device makers also pay Qualcomm royalties for using its patented technology, which forms a second business alongside chip sales. Qualcomm was founded in 1985 and is based in San Diego, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Diego, CA
Founded
1985

Recently Posted Jobs

Explore more opportunities at Qualcomm

See more jobs