VLSI IP Characterization Engineer Senior to Staff - ASICS Engineering

Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

We are looking for talented and ambitious individuals to join the TECHIP team. The candidate should have a solid academic VLSI background and good software programming skills. Experience in industrial EDA tool automation and IP characterization is a plus.

Minimum Qualifications

• Possess the basic knowledge of CMOS, FinFET logic and transistor, basic of digital circuit design optimization

• Have Standard cell / Memory/IO circuit knowledge & IP characterization background.

• Strong logical and problem-solving skills with excellent analytical and debugging skills

• Strong Software programming skills in Python or Perl in UNIX/Linux computing platform

• Highly motivated, excellent team spirit and good communication skills.

Preferred Qualifications

• Hands-on experience in industrial EDA tool automation, data analysis and visualization & large-scale software automation enablement.

• Familiar with industry standard Design kit (DK) views, Liberty formats for foundation IPs (advanced modeling formats CCS, LVF) , statistical variation models & worked on development of the same.

• Familiarity with front end pre-silicon design flow, RTL design/coding, logic design, Verilog/ System Verilog, RTL design verification, System Verilog Assertion (SVA), Design for Test, BIST modeling experience.

• Experience in Static Timing Analysis, physical design is a plus.

• Experience of spice simulation models, design rules verification procedures (like DRC/LVS/ERC) is a plus.

Education Qualifications

• Required: Bachelors, Electrical Engineering or Computer Engineering or Computer Science

• Preferred: Master's, Electrical Engineering or Computer Engineering or Computer Science

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

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