Formal Verification Engineer - AI/ML Engineer

Summary

Apple's Hardware Technologies Formal Verification team is seeking an AI/ML Engineer to work at the intersection of Artificial Intelligence and Formal Verification. In this role, you will explore, prototype, and build AI-powered systems — with a focus on Large Language Models — to augment and transform how formal verification is performed on Apple Silicon. You will work closely with formal verification engineers, design engineers, and EDA tool developers to identify high-impact opportunities and deliver practical, domain-specific AI applications.

Minimum Qualifications

A minimum of a bachelor's degree in relevant field and a minimum of 10 years of relevant industry experience.

Preferred Qualifications

Strong hands-on experience building AI/ML applications, particularly those leveraging Large Language Models (LLMs) — including prompt engineering, fine-tuning, RAG architectures, agentic systems, or LLM-based tool chains. Demonstrated ability to take AI capabilities from prototype to production — you have shipped or deployed AI-powered tools or applications, not just trained models. Proficiency in Python and modern ML/AI frameworks and tooling (e.g., PyTorch, LangChain, LlamaIndex, Hugging Face, or similar). Background in formal methods, mathematical logic, or a strong mathematical foundation — whether through academic training (e.g., formal methods, type theory, automated reasoning, mathematical logic) or applied experience. You don't need to be an FV expert, but a quantitative and rigorous mindset is essential. Genuine interest in domain-specific AI applications — you are excited about going deep into a specialized engineering domain rather than building general-purpose AI products. Software engineering best practices — version control, testing, API design, and building maintainable, collaborative codebases. Excellent communication and interpersonal skills — you will work across disciplines with FV engineers, design engineers, and tooling teams. Self-directed and comfortable with ambiguity — you will need to identify opportunities, propose solutions, and drive them forward. Experience working on or contributing to LLM tooling, frameworks, or infrastructure (e.g., inference engines, model serving, evaluation harnesses). Prior exposure to hardware design or verification concepts (RTL, SystemVerilog, assertions, EDA tools). Familiarity with formal methods, SAT/SMT solvers, model checking, or theorem proving. Experience with code generation or analysis tasks using LLMs. MS or PhD in Computer Science, Electrical Engineering, Mathematics, or a related field — though exceptional industry experience is equally valued.

Description

You will be responsible for: Building domain-specific AI applications that leverage LLMs and other ML techniques to accelerate formal verification workflows — from specification interpretation to property generation, proof debugging, and beyond. Developing and fine-tuning LLM-based systems tailored to hardware verification tasks, including retrieval-augmented generation (RAG) pipelines, agentic tool-use frameworks, and domain-adapted models. Collaborating with formal verification engineers to deeply understand FV methodologies, pain points, and opportunities where AI can meaningfully improve productivity, quality, and coverage. Prototyping novel AI-driven approaches for tasks such as automatic SVA property synthesis, natural-language-to-formal-specification translation, proof strategy recommendation, and intelligent counterexample analysis. Evaluating and integrating emerging AI/ML research into practical, production-quality tools and workflows used by the FV team. Establishing best practices and infrastructure for AI application development within the FV organization.