SI Hardware Design Verification Engineer Intern

Job Description

Consider before submitting an application:

This position is expected to start January 2027 and continue through Spring term (ending approximately April 2026). We ask for a minimum of 12 weeks, full-time (40 hours/week) and on-site, for most internships. Our internship program is for students who are actively enrolled in an academic program. Recent graduates seeking employment after graduation and not returning to school should apply for full-time positions, not internships.     

International Students: If your work authorization is through CPT, please consult your school on your ability to work 40 hours per week before applying. You must be able to work 40 hours per week on-site. Many students will be limited to part-time during the academic year.

The Internship Recruiting Team is driven by the passion to recognize and develop emerging talent. Our year-round program places the best students in positions where they will grow technically, professionally, and personally through their experience working closely with their Manager, Mentor, and team. We are dedicated to providing an experience that allows the intern to experience life at Tesla by including them in projects that are critical to their team’s success. 

Multiple Locations Possible: Palo Alto, CA; Austin, TX

Job Responsibilities

• Verify logic at block, IP, subsystem & fullchip level
• Understand details of High Efficiency SOC Architecture, standard SOC peripherals, bus protocols, Network on chip (NOC) and I/O, memory management schemes, multi-processor systems, Memory Controller Sub Systems
• Write tests sequences, Assertions (SVA) and coverage to exhaustively test RTL  
• RTL debug to root cause and in some cases fix issues in collaboration with Design engineers
• Running and triaging regressions using frameworks such as Jenkins and X-ray  
• Scripting in Python for data parsing or workflow control 
• Writing C and Python for Microcontrollers, FPGA and ASICs  

Job Requirements

• Currently pursuing a degree in Computer Engineering, Electrical Engineering, or a related field 
• Experience in SOC DV bring-up, clocks, power, reset, boot
• Experience verifying high speed memory IPs & IO
• Experience with amba bus protocols
• Experience verifying CPU/GPU/IPs integration at the SOC level
• Strong programming skills in UVM, System Verilog, C/C++, Python/Perl