Cadence Design Systems

Develops EDA software, IP, verification tools

Principal Product Engineer

Software EngineeringConfirmed live in the last 24 hours

Full-timeZhubei City, TaiwanNo salary listedIn-person

About the Job

Requirements

A BS degree with 7+ years or an MS degree with 5+ years of engineering work experience in the semiconductor industry.
Experience in physical implementation, place-and-route, and signoff tools.
Familiarity with Cadence digital flows and advanced packaging design with Allegro Package Designer.
Hands-on experience in scripting languages such as Tcl, Perl, YAML, and Python.
Troubleshooting and technical documentation skills.
A self-motivated, proactive learner and team player with communication skills and a customer-oriented attitude.

Responsibilities

Develop and integrate various EDA tools and engines into the consolidated 3D-IC platform.
Work closely with the R&D group to develop, integrate, and enhance EDA solutions, including 3D-IC system planning, implementation, and analysis/verification.
Collaborate with field teams on customer engagement and provide technical support and guidance.
Communicate and coordinate with multiple R&D groups and field teams to enable EDA solutions for customers.

Desired Qualifications

Knowledge and experience in 3D-IC system planning, implementation, analysis, and signoff flows.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

Product Engineer for Integrity 3D-IC
Developing and integrating various EDA tools and engines into the consolidated 3D-IC platform.
Working closely with R&D group to develop, integrate and enhance EDA solutions, including 3D-IC system planning, implementation, and analysis/verification.
Collaborating with the field teams for customer engagement and providing technical support and guidance.
Communicating and coordinating with multiple R&D groups and field teams to enable EDA solutions to customers.

Position Requirements

BS degree with 7+ years or MS degree and 5+ years of engineering work experience in the semiconductor industry.
Experience in physical implementation, place-and-route, and signoff tools. Familiar with Cadence digital flows and advanced packaging design with Allegro Package Designer.
Knowledge and experience in 3D-IC system planning, implementation, analysis, and signoff flows is a plus
Hands-on experience in scripting languages, such as TCL, Perl, YAML, and Python.
Good trouble-shooting and technical documentation skills.

A self-motivated, proactive leaner and team player, with excellent communication skills and a customer-oriented attitude.

We’re doing work that matters. Help us solve what others can’t.

About the Company

Cadence Design Systems

Develops EDA software, IP, verification tools

Cadence Design Systems supplies software, hardware, and IP for electronic design automation (EDA) to help customers create advanced semiconductor chips and electronic systems. Its tools handle system design, verification, digital and analog IC design, and custom flows, while IP such as Tensilica processors and DSP cores can be licensed for integration into customer products. The offerings are delivered as software licenses with maintenance and support, plus IP licensing and occasional hardware-accelerated options. The company differentiates itself with a broad, end-to-end EDA portfolio and close collaboration with industry leaders to streamline the path from concept to silicon, aiming to help customers bring sophisticated silicon and electronics to market faster with lower risk and higher productivity.

Company size: 10,001+
Company stage: IPO
Headquarters: San Jose, CA
Founded: 1988

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