ASIC DV Engineer – Principal/Manager - ASICS Engineering

Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Education:

MS in EE.

Experience:

10 to 15+ years ASIC design/verification experience. Experience in merchant silicon or switching ASIC (e.g., Broadcom/Marvell/Realtek/MTK networking chips) is highly desirable.

Requirements:

• Deep expertise in ASIC development, especially switch verification using System Verilog / UVM, SVA and Coverage-driven methodology, Emulation / FPGA validation
• Deep expertise in Ethernet switch architecture, including:
  • Forwarding pipelines (L2/L3, ACLs, tunneling)
  • Traffic management (QoS, scheduling, shaping)
  • High-performance packet processing and scaling strategies
• Strong leadership and cross-functional influence capability
• Strong debugging and system-level problem-solving skills
• Excellent teamwork, interpersonal and communication skills.
• Fluent in Chinese and English both verbal and written.
• Ability to work in stressful situations with tight schedules to meet.

Description of Function & Responsibility

• Drive architecture definition and technical strategy for next-generation Ethernet switch ASICs, enabling scalable, high-performance networking solutions.
• Define verification architecture for Ethernet switch ASICs from Module level, Subsystem level to System level
• Drive cross-functional alignment with HW, SW, and Product teams on networking features and performance verification
• Drive schedule alignment and ensure on-schedule execution with Arch and Design Team
• Mentor senior technical leaders and influence organization-wide engineering direction

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

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