Register-Transfer Level Design Senior Lead/Staff - NoC, Hardware Engineering

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Position: Staff Engineer

Seeking highly experienced and motivated NoC Design lead to architect and drive the development of advanced Network-on-Chip solutions for next-generation SoCs. This role involves leading a team of engineers, collaborating across IP, SoC, and verification teams, and delivering high-performance, scalable, and power-efficient interconnect architectures.

Skills & Experience

• MTech/BTech in EE/CS with 8+ years of ASIC Design experience.
• Strong fundamentals and experience in micro-architecture development and RTL Digital design.
• Exposure to front-end flows (Lint, CDC, low-power checks, Synth etc.)
• Knowledge of protocols like AXI/ACE/CHI/AHB is highly desirable
• Experience with NoC tools is a plus.
• Hands on experience in Multi Clock designs, Asynchronous interface is a must.
• Understanding of constraint development and timing closure is a plus.
• Excellent problem-solving skills, strong communication and teamwork skills are mandatory.
• Must be flexible to contribute in various capacities (beyond RTL design) to the end product goals
• Proven ability to lead and mentor design teams.

Responsibilities

• Define and architect NoC solutions for complex SoCs targeting mobile, compute, automotive, or AI applications.
• Develop scalable, low-latency, and power-efficient interconnect topologies.
• Lead a team of NoC designers and ensure design meets functional, performance, and power targets.
• Collaborate with SoC architects, IP owners, verification, and physical design teams.
• Drive design reviews, performance analysis, and optimization efforts.
• Work with functional verification team on test-plan development and waveform debugs at core, sub-system, SoCs levels.
• Support performance debugs and address performance bottlenecks
• Provide support to sub-system, SoC integration and chip level debug.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

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