EM Design Engineer - RFIC Design

Company:

Qualcomm Atheros, Inc.

Job Area:

Engineering Group, Engineering Group > RFIC Design

General Summary:

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in.

QCT's RF EM Team is actively seeking engineers with demonstrated experience in the design, EM simulation and circuit modeling of passive RF passive components for use in our RFIC designs.

Responsibilities:
- Design and develop RF passive components for use in the next generation of highly integrated RF integrated circuits in deep sub-micron 6nm and 14ff CMOS and SOI technologies.
- Work with the circuit design team to optimize component sizes and performance for use in RF circuit blocks.
- Deliver components that include compact models, and DRC clean physical designs.
- Execute isolation analysis and optimization to reduce on-chip and chip to package coupling.
- Optimization of multichip carriers for RF systems, focusing on loss and isolation.

Preferred Qualifications
- Experience in the design and simulation of RF passive components such as inductors, transformers, MOM capacitors and passive filters.
- Demonstrated abilities with EM simulation techniques and tool including MoM EM solvers, HFSS, and EMX.
- Experience with circuit design and layout using Cadence tools and Agilent ADS.
- Compact RLCK Model extraction of multiport passive components.
- Ability to use EM tools to predict circuit level electric and magnetic coupling.
- Passionate self-starter and team player with experience in project leadership and multi-tasking.

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering with 3+ years of experience with designing RF/Analog circuits for wireless products (e.g., LNA's, PLL's) and 2+ years of ASIC design, verification, or related work experience.
OR
Master's degree in Electrical Engineering or related field and 2+ years of ASIC design, verification, or related work experience.
OR
PhD in Electrical Engineering or related field.

• 2+ years of academic or professional experience using two or more of the following software: CADENCE, Virtuoso, ADS.

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EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$147,900.00 - $221,900.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm.  We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).  In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.