Texas Instruments

Makes analog and embedded chips in its own plants

Layout Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours

Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

A bachelor's degree in electrical and electronics engineering is required.
At least 2 years of experience is required; the posting gives a 2–5 year experience range.
Experience with full-chip layout from definition through release of an integrated circuit to production is required.
Strong skills in Layout Versus Schematic (LVS), Design Rule Check (DRC), Electrical Rule Check (ERC), and antenna debugging are required.
Proficiency in analog and mixed-signal layout techniques and verification processes, including device matching, power bus design, cross-talk avoidance, and Electrostatic Discharge/Latch-up protection techniques, is required.
A good understanding of layout parasitics, including resistance, capacitance, diodes, and bipolar junction transistors, is required.
A good understanding of device physics and semiconductor fabrication processes is required.
Experience with one or more of the listed process technologies is required: 40 nm, 65 nm, 90 nm, 130 nm, 180 nm, or BiCMOS.
Proficiency with Virtuoso XL, Assura, PVS, or Voltas is required.
The role requires teamwork, communication, problem-solving, documentation, and time-management skills, and the ability to take initiative and drive results.

Responsibilities

Frame the layout schedule, estimate effort, and develop risk and mitigation plans for layout activities for all layout engineers on the project.
Work closely with designers to understand the integrated circuit architecture and key requirements.
Balance area, performance, and schedule during layout development by collaborating with design, packaging, and process teams.
Work with the process development team on process design kit, parameterized-cell, and design-rule updates.
Work with packaging engineers to develop custom lead frames for various packages.
Analyze and close electro-migration, thermal-gradient, Electrostatic Discharge/Latch-up performance, and layout-parasitic issues.
Routinely develop test vehicles for new process and package technology development.
Mentor and guide junior layout engineers and contract engineers, review their work, and provide feedback to meet quality and schedule standards.
Own the final layout and ensure it meets design expectations and the layout checklist.
Identify needed improvements in process, quality, and cycle time, and undertake initiatives to implement them.

Desired Qualifications

Experience in automation or SKILL coding to reduce cycle time or support quality checks is an added advantage.
Ability to ramp up quickly on new tools and processes.

Change the world. Love your job.
Texas Instruments is seeking a Layout Engineer. In this role, you will develop and prepare multi-dimensional layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. You may also check dimensions, write specifications, and verify completed drawings, artwork or digitized plots. Additional job functions may involve checking design layouts and detailed drawings, referring to offline layout leveling charts for details on duties. A bachelor's degree in engineering is typically required, and in the U.S. this job is restricted to specific job grades.

Minimum requirements:

Minimum education (ie bachelor's degree in electrical and electronics engineering)
Minimum of 2-5 years of experience

Roles and responsibilities:

Frame the layout schedule, effort estimation, risk and mitigation plan of layout activities for all layout engineers in the project
Work closely with designers to understand the architecture and key requirements for the IC
Strike right balance of area, performance and schedule during layout development by collaborating with design, packaging and process teams
Work closely with Process development team to carry out PDK, P-cell and Design rule updates
Work closely with Packaging engineer to develop custom lead-frames for various packages
Analysis and closure of Electro Migration, Thermal gradients, ESD/LU performance and layout parasitic
Routinely develop test vehicles for new process & package technology development
Mentor and guide junior layout engineers/contract engineers, review their work and provide feedback to meet the quality and schedule norms
Responsible for the final layout which meets the design expectations and layout checklist.
Identify improvements needed in process/ quality/ cycle time and take up necessary initiatives

Knowledge and skills:

Full chip layout experience from definition through release of IC to production
Strong LVS, DRC, ERC, and antenna debug skills
Proficient in analog and mixed-signal layout techniques and verification process including Device Matching, Power Bus design, avoiding Cross-talk, ESD/LU protection techniques
Good understanding about all layout parasitics (R, C, diodes, BJTs)
Good understanding of device physics and semiconductor fabrication process
Must have worked on some of the Technologies like: 40nm, 65nm, 90nm, 130nm, 180nm, BiCMOS
Should be well versed with tools such as Virtuoso XL/Assura /PVS/Voltas
Ability to quickly ramp up on new tools/ process and mentor LEs
Experience in automation/ SKILL coding for reducing cycle time/ quality checks will be an added advantage
Requires excellent teamwork, good communication, strong problem-solving and documentation skills.
Strong time management skills for on-time project delivery
Ability to take initiatives and drive for results

About the Company

Texas Instruments

Makes analog and embedded chips in its own plants

Texas Instruments designs and makes analog and embedded processing chips, the basic parts inside cars, factory equipment, data centers, and consumer electronics, and it sells one of the broadest chip catalogs in the industry. In 1958, its engineer Jack Kilby built the first integrated circuit, the building block of modern electronics, and later won a Nobel Prize for it. Its analog chips regulate power and convert signals such as sound and heat into data, while its microcontrollers act as small built-in computers, and TI earns money selling both to device makers. It also makes the graphing calculators many students use in math class. Texas Instruments was founded in 1930 and is based in Dallas, Texas.

Company size: 10,001+
Company stage: IPO
Headquarters: Dallas, TX
Founded: 1930

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