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Kandou AI

Provides chip-to-chip AI connectivity solutions

Firmware Architect

Embedded EngineeringConfirmed live in the last 24 hours
Full-timeNo salary listed

About the Job

Requirements

  • Good knowledge of C (C99 and MISRA), assembly for critical paths, and Python for tools.
  • Good knowledge of continuous integration and continuous delivery, static analysis, and hardware-in-the-loop tests.
  • Good understanding of standards implementation, including IEEE 802.3 and OIF.
  • Good knowledge of SerDes architecture, including equalization, telemetry, and interrupts.
  • 8–10 years of embedded firmware experience in high-speed SerDes or retimer products.
  • Hands-on experience with PAM4 adaptation (LMS/CMA) and FEC (KP4/RS-544).
  • Experience leading silicon bring-up from first samples to production.
  • Experience with IEEE 802.3ck and 802.3dj link training.
  • Experience with RTOS (FreeRTOS/Zephyr) on constrained MCUs (1 MB flash, 256 KB RAM).
  • A BS in Electrical Engineering, Computer Engineering, or Computer Science; an MS with DSP/comms focus is preferred.

Responsibilities

  • Define firmware architecture for 224G/lane AEC retimer (boot, configuration, calibration, link training, equalization, FEC, and telemetry).
  • Implement link training for IEEE 802.3ck (100G/lane) and 802.3dj (200G/lane), including adaptation algorithms and fallbacks.
  • Own FEC interaction (KP4, RS-544) and telemetry pipeline for Predictive Telemetry.
  • Lead silicon bring-up in partnership with ASIC design and signal integrity.
  • Ensure standards compliance (IEEE 802.3ck/dj, OIF-CEI, CMIS, and OSFP).
  • Partition hardware-fixed versus firmware-adaptation functions (equalization and SNR monitoring).
  • Travel up to 15% for silicon bring-up and standards meetings.

Desired Qualifications

  • An MS degree with DSP/comms focus is preferred.

About the Company

Kandou AI

Provides chip-to-chip AI connectivity solutions

Kandou AI designs and sells semiconductor connectivity hardware for AI workloads. It provides a memory fabric and CXL controllers that link processors to memory, enabling scalable, energy-efficient AI inference and training clusters built from affordable hardware. Using Copper MIMO interconnect, it reduces energy per bit and supports features like offloading AI training collectives, switchless memory for in-memory databases, and field-repairable co-packaged optics for better cooling. By targeting the data-movement bottleneck between processors and memory and offering chiplet-based fabrics and IP licensing, Kandou AI aims to make scalable AI infrastructure more accessible to hyperscalers, data centers, and system integrators.

Company size
201-500
Company stage
Late Stage VC
Total funding
$504.7M
Headquarters
Lausanne, Switzerland
Founded
2011

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