Physical Design Engineer Intern
About the job
- Currently enrolled in a Bachelor's degree program in Electrical Engineering, Computer Engineering, or a related field, with an expected graduation date between Fall 2027 and Summer 2028.
- Completed courses focusing on VLSI, digital logic, circuit design, computer architecture, RTL synthesis, Verilog or SystemVerilog, place and route, static timing analysis, digital systems, or microelectronics.
- Proficiency in programming and scripting languages such as Python, TCL, Perl, and Shell.
- Experience working in a Unix-type environment.
- Experience using tools such as Synopsys PrimeTime, Cadence Tempus, and Mentor.
- Strong analysis, problem-solving, and communication skills.
- Applicants must be eligible to access export-controlled information under applicable law; applicants other than U.S. citizens, lawful permanent residents, or protected individuals may be subject to an export license review process prior to employment.
- Perform synthesis, floor planning, place and route, clock insertion, timing analysis, and timing closure on complex logic blocks using industry-standard EDA tools such as PrimeTime and Tempus.
- Write scripts in Python, TCL, Perl, and Shell to support design and development activities.
- Use problem-solving skills to analyze and debug design violations and implement fixes using CAD tools.
- Collaborate with RTL, synthesis, and other design teams to resolve congestion and timing bottlenecks and ensure designs converge and integrate in a timely manner.
About the company
Marvell Technology, Inc. creates high-performance semiconductor products that power data infrastructure for telecommunications operators, data centers, and enterprises. Its offerings span computing, storage, and networking to enable efficient, secure data transmission, storage, and processing. The products are programmable and scalable platforms designed for high bandwidth and strong security, supporting 5G networks and the broader digital economy. Revenue comes from designing, manufacturing, licensing, and providing related services to other businesses that integrate these components into their own products. Unlike many peers, Marvell emphasizes programmable, scalable platforms tailored to data infrastructure needs and long-term partnerships with enterprise and telecom customers. The company aims to help customers upgrade their networks and data systems to increase capacity, performance, and efficiency while expanding its own business in the data infrastructure space.
Company Size
10,001+
Company Stage
IPO
Headquarters
Santa Clara, California
Founded
1995
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Simplify's Take
What believers are saying
- Q2 fiscal 2027 revenue grew 37%, and data center sales reached 79%.
- Management raised fiscal 2028 revenue guidance to about $18 billion in September 2026.
- Bank of America named Marvell a top AI chip pick on October 1, 2026.
What critics are saying
- Data center revenue concentration hit 79% in Q2 fiscal 2027, leaving one customer cohort dominant.
- Non-GAAP gross margin guides down to 57.5%-58.5% as custom chip volume rises.
- Broadcom and Qualcomm are attacking hyperscaler custom silicon deals, threatening Marvell's design-win pipeline.
What makes Marvell unique
- Marvell spans custom silicon, Ethernet, and optics across AI data center connectivity.
- Its September 20, 2026 ECOC demos reached 2nm 400G, 800G, 1.6T, and 102.4T CPO.
- AT&S expanded substrate capacity on September 22, 2026, backing Marvell's AI scale-up.
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Benefits
- Health Insurance
- 401(k) Retirement Plan
- 401(k) Company Match
- Flexible Work Hours
- Paid Vacation
- Hybrid Work Options