Lyte AI

Robotics perception platform with silicon-level fusion

Operations Engineer - III-V Photonics Manufacturing

Manufacturing Engineering +1Updated on Nov 13

Full-timeTaiwan

About the Job

Requirements

A bachelor's degree in Materials Science, Electrical Engineering, Physics, Optical/Photonics Engineering, Chemical Engineering, or a related technical field, or equivalent hands-on industry experience.
Three to five years of hands-on experience with III-V compound semiconductor wafer processing, such as GaAs and/or InP.
Demonstrated experience taking hardware or semiconductor products through the full manufacturing lifecycle, from new product introduction and process/design qualification through pilot builds to high-volume production ramp.
Direct experience with post-wafer, bar-level processes, including facet coating, bar-to-die testing, and automated optical inspection.
Hands-on experience with chip-on-carrier assembly, burn-in, and chip-on-carrier test processes.
A solid understanding of distributed feedback laser structures and epitaxial design fundamentals for optoelectronic devices.
Experience working directly with foundries, outsourced semiconductor assembly and test providers, or contract manufacturers on process control, yield improvement, and quality across low-volume qualification builds and high-volume production.
Strong data analysis skills, including statistical process control, design of experiments, and Cp/Cpk-based yield and quality reporting.
Willingness to travel regularly to, and/or be based near, partner fab, assembly, and test sites in Taiwan.
Fluency in Mandarin and English sufficient to work with local manufacturing partners and global engineering teams.

Responsibilities

Serve as the on-the-ground operations engineer at III-V compound semiconductor foundry and outsourced semiconductor assembly and test partners in Taiwan and Asia, overseeing day-to-day production of wafer processes, laser bars, and photonic dies.
Partner with wafer suppliers’ engineering teams on incoming wafer quality control and III-V epitaxial growth process control and yield against specifications.
Work with foundry partners on III-V wafer-level process improvement, raising Cp/Cpk and reducing defects to support new product introduction qualification and sustained volume yield.
Own quality for post-wafer processing, including bar-level facet coating, bar-to-die singulation, die testing, and automated optical inspection, driving yield and quality improvements from first article through volume production.
Manage chip-on-carrier assembly processes at contract manufacturing and assembly partners, including process qualification, line setup, and production ramp support.
Own burn-in and chip-on-carrier test operations, including real-time test data review, screening criteria, and failure analysis to ensure reliability targets are met in low-volume new product introduction builds and full production.
Drive root cause analysis and corrective action for yield excursions and quality escapes across epitaxy, wafer fabrication, facet coating, die test, chip-on-carrier assembly, burn-in, and chip-on-carrier test.
Own new product introduction and process qualification for new epitaxial structures, wafer processes, and packaging configurations, then transfer them into stable, high-volume manufacturing with engineering and manufacturing partners.
Partner with design and process engineering during new product introduction to drive design for manufacturing and design for test improvements that reduce cost and improve yield ahead of volume ramp.
Develop capacity plans and line-balancing strategies with foundry, outsourced semiconductor assembly and test, and contract manufacturing partners to scale output from prototype and pilot volumes to full production.
Establish and maintain statistical process control, control plans, work instructions, and travelers for each process step, ensuring consistent execution across shifts, partners, and production stages.
Track and report production yield, cycle time, work in progress, and quality metrics against ramp milestones; escalate build-plan risks and provide regular status updates to US-based engineering and operations leadership.
Coordinate component and material supply with foundry, outsourced semiconductor assembly and test, and contract manufacturing partners to support build plans and production schedules through the ramp to volume.
Travel to and work on-site at partner fabs, assembly houses, and test facilities across Taiwan and Asia as needed to resolve issues and support production ramps.
Collaborate with optical, chip design, packaging, and systems engineering teams across time zones to translate design intent into manufacturable, high-yield processes.

Desired Qualifications

An advanced degree in Materials Science, Electrical Engineering, Physics, or a related field.
Direct experience with distributed feedback or Fabry–Pérot laser diode and photodiode epitaxial structures and device physics.
Prior experience in a contract manufacturing or outsourced semiconductor assembly and test environment, leading products from new product introduction through mass-production ramp, including multiple ramp cycles across different product generations.
Experience qualifying a second manufacturing source or transferring a process from a new product introduction or pilot line to a high-volume production line.
Experience with production ramp planning methodologies, including ramp curves, capacity modeling, line balancing, and process validation such as PPAP-style qualification.
Familiarity with metal-organic chemical vapor deposition or molecular beam epitaxy equipment and process characterization tools, including secondary ion mass spectrometry, X-ray diffraction, atomic force microscopy, scanning electron microscopy, photoluminescence, and Hall measurement.
Experience with optical and laser component test and characterization, including light-current-voltage, spectral testing, and reliability or life testing.
Six Sigma, Lean Manufacturing, or equivalent continuous-improvement experience.
Experience supporting a fabless or vertically integrated photonics or lidar company while coordinating with a US-based engineering headquarters.
Familiarity with lidar, frequency-modulated continuous-wave, or automotive and robotics sensor technologies.

About Lyte

Lyte builds perception systems for Physical AI operating in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next-generation automation. Lyte is headquartered in Sunnyvale, California, with a global presence. For more information, visit www.lyte.ai

If you’re excited about building impactful technology in a dynamic, hands-on environment, we’d love to hear from you!

About the role

We are seeking an experienced Operations Engineer based in Taiwan to lead Lyte’s III-V photonic components - lasers, photodetectors, and related devices - through the full manufacturing lifecycle, from new product introduction (NPI) and process qualification through pilot builds to high-volume production. The scope spans wafer process and integration, bar-level facet coating, bar-to-die test and AOI, chip-on-carrier (CoC) assembly, and burn-in/CoC test. You will manage and work closely with Lyte’s foundry, OSAT, and contract manufacturing partners in Taiwan and Asia to qualify processes, scale yield and capacity, and drive disciplined ramps from first engineering builds to sustained volume manufacturing for the III-V components at the heart of Lyte’s 4D FMCW lidar sensors.

What you'll do

Serve as Lyte’s on-the-ground operations engineer at III-V compound semiconductor foundry and OSAT partners in Taiwan and Asia, overseeing day-to-day production of wafer process, laser bars, and photonic dies.
Partner with wafer suppliers’ engineering teams on incoming wafer quality control and III-V epitaxial growth process control and yield against Lyte’s specifications.
Work closely with foundry partners on III-V wafer-level process improvement — raising Cp/Cpk and reducing defects — to support both NPI qualification and sustained volume yield.
Own quality for post-wafer processing steps including bar-level facet coating, bar-to-die singulation, die testing, and automated optical inspection (AOI), driving yield and quality improvements from first article through volume production.
Manage chip-on-carrier (CoC) assembly processes at contract manufacturing/assembly partners, including process qualification, line set-up, and production ramp support.
Own burn-in and CoC test operations, including real-time test data review, screening criteria, and failure analysis to ensure reliability targets are met at both low-volume NPI builds and full production rates.
Drive root cause analysis and corrective action for yield excursions and quality escapes across epi, wafer fab, facet coating, die test, CoC assembly, burn-in, and CoC test.
Own new product introduction (NPI) and process qualification for new epi structures, wafer processes, and packaging configurations, then drive the disciplined transfer into stable, high-volume manufacturing in partnership with Lyte’s engineering team and manufacturing partners.
Partner with design and process engineering during NPI to drive design-for-manufacturing (DFM) and design-for-test (DFT) improvements that reduce cost and improve yield ahead of volume ramp.
Develop capacity plans and line-balancing strategies with foundry, OSAT, and contract manufacturing partners to scale output as programs move from prototype and pilot volumes into full production.
Establish and maintain SPC, control plans, work instructions, and travelers for each process step, ensuring consistent execution across shifts, partners, and production stages.
Track and report production yield, cycle time, WIP, and quality metrics against ramp milestones; escalate risks to build plans and provide regular status updates to Lyte’s US-based engineering and operations leadership.
Coordinate component and material supply with foundry, OSAT, and contract manufacturing partners to support build plans and production schedules through the ramp to volume.
Travel to and work on-site at partner fabs, assembly houses, and test facilities across Taiwan and Asia as needed to resolve issues and support production ramps.
Collaborate cross-functionally with Lyte’s optical, chip design, packaging, and systems engineering teams (many based in the US) across time zones to translate design intent into manufacturable, high-yield processes.

Required Qualifications

Bachelor’s degree in Materials Science, Electrical Engineering, Physics, Optical/Photonics Engineering, Chemical Engineering, or a related technical field (or equivalent hands-on industry experience).
3-5 years of Hands-on experience with III-V compound semiconductor wafer processing (GaAs and/or InP).
Demonstrated experience taking hardware or semiconductor products through the full manufacturing lifecycle - from NPI and process/design qualification, through pilot builds, to high-volume production ramp.
Direct experience with post-wafer, bar-level processes: facet coating, bar-to-die testing, and automated optical inspection (AOI).
Hands-on experience with chip-on-carrier (CoC) assembly, burn-in, and CoC test processes.
Solid understanding of DFB laser structures and epitaxial design fundamentals for optoelectronic devices.
Experience working directly with foundries, OSATs, or contract manufacturers on process control, yield improvement, and quality — across both low-volume qualification builds and high-volume production.
Strong data analysis skills, including SPC, DOE, and Cp/Cpk-based yield and quality reporting.
Excellent verbal and written communication skills; comfortable working on-site with manufacturing partners and coordinating with cross-functional, cross-time-zone engineering teams.
Willingness to travel regularly to, and/or be based near, partner fab, assembly, and test sites in Taiwan.
Fluency in Mandarin and English, sufficient to work with local manufacturing partners and Lyte’s global engineering teams.

Preferred Qualifications

Advanced degree in Materials Science, Electrical Engineering, Physics, or a related field.
Direct experience with DFB or FP laser diode and photodiode epitaxial structures and device physics
Prior experience in a contract manufacturing (EMS) or OSAT environment, leading products from NPI through mass-production ramp, including multiple ramp cycles across different product generations
Experience qualifying a second manufacturing source or transferring a process from an NPI/pilot line to a high-volume production line
Experience with production ramp planning methodologies — ramp curves, capacity modeling, line balancing, and process validation (e.g., PPAP-style qualification)
Familiarity with MOCVD or MBE epitaxial growth equipment and process characterization tools (SIMS, XRD, AFM, SEM, photoluminescence, Hall measurement)
Experience with optical/laser component test and characterization (L-I-V, spectral, reliability/life testing)
Six Sigma, Lean Manufacturing, or equivalent continuous-improvement experience
Experience supporting a fabless or vertically integrated photonics/lidar company while coordinating with a US-based engineering headquarters.
Familiarity with lidar, FMCW, or automotive/robotics sensor technologies.

Benefits (subject to location and local regulations)

Competitive salary and equity
Collaborative, fast-paced, and inclusive work environment
Opportunity to work on cutting-edge technologies with a highly cross-functional team

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About the Company

Lyte AI

Robotics perception platform with silicon-level fusion

Lyte AI builds an end-to-end perception stack for robots, from custom sensing silicon to software. Its LyteVision platform combines camera data, inertial measurements, and a 4D distance-velocity sensor into a single synchronized data stream at the silicon level. This reduces latency and calibration drift that can occur when stitching together separate sensors. The system is designed for industrial uses such as inspection, logistics, and manufacturing robots, and also aims to power broader Physical AI platforms. The company differentiates itself through its fully integrated, silicon-level sensor fusion and a pedigree of engineers who helped create depth sensing for devices like Face ID and Kinect, backed by substantial funding to scale silicon production and deployments. Its goal is to provide reliable, low-latency robot perception to enable scalable automation across industrial settings.

Company size: 51-200
Company stage: Series C
Total funding: $272M
Headquarters: Mountain View, CA
Founded: 2021

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