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Cadence Design Systems

Develops EDA software, IP, verification tools

Analog/Mixed-Signal IC Design Co-op Intern

Silicon & ASIC DesignConfirmed live in the last 24 hours
Internship · Summer 2026Montreal, QC, CanadaIn-person

About the Job

Requirements

  • Candidates must be Canadian citizens or permanent residents.
  • Candidates must demonstrate problem-solving ability and aptitude in analog design, and be able to work cooperatively in a team environment.
  • Candidates must currently be enrolled in a Bachelor of Science or Master of Science program majoring in Electrical Engineering or an equivalent field.

Responsibilities

  • Use and learn analog/mixed-signal integrated circuit design and simulation techniques to investigate selected topics of interest.
  • Work on one or more circuit blocks in subsystems including analog front-end and receiver equalizer circuits, phase interpolators, clock synthesis, clock distribution and clock multiplexing, decision-feedback equalizers, transmit paths, or biasing.
  • Demonstrate an understanding of the problems being investigated.
  • Document and present circuit experiments and simulation results in internal design review meetings.

Desired Qualifications

  • Familiarity with scripting languages.

About the Company

Cadence Design Systems

Develops EDA software, IP, verification tools

Cadence Design Systems supplies software, hardware, and IP for electronic design automation (EDA) to help customers create advanced semiconductor chips and electronic systems. Its tools handle system design, verification, digital and analog IC design, and custom flows, while IP such as Tensilica processors and DSP cores can be licensed for integration into customer products. The offerings are delivered as software licenses with maintenance and support, plus IP licensing and occasional hardware-accelerated options. The company differentiates itself with a broad, end-to-end EDA portfolio and close collaboration with industry leaders to streamline the path from concept to silicon, aiming to help customers bring sophisticated silicon and electronics to market faster with lower risk and higher productivity.

Company size
10,001+
Company stage
IPO
Headquarters
San Jose, CA
Founded
1988

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