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Cadence Design Systems

Develops EDA software, IP, verification tools

Lead Product Engineer - Analog Design Automation

Implementation & Technical Account ManagementUpdated on Nov 11
Full-timeArizona, USANo salary listedRemote

About the Job

Requirements

  • Strong hands-on experience in analog and mixed-signal circuit design.
  • Deep familiarity with Virtuoso schematic, simulation, and ADE environments.
  • Exposure to design automation, circuit optimization, or migration flows.
  • Understanding of layout-dependent effects and the impact of parasitics on circuit performance.
  • Ability to work directly with customers, understand design challenges, and explain technical concepts clearly.
  • A bachelor's or master's degree in Electrical Engineering, Computer Engineering, or a related field, with at least five years of relevant experience.

Responsibilities

  • Drive the development and customer adoption of analog design automation flows in Virtuoso, including AI-driven optimization, parasitic-aware design, and layout-driven design methodologies. The role supports scaling next-generation analog design automation flows.

Desired Qualifications

  • Scripting or automation experience, such as SKILL or Python.

About the Company

Cadence Design Systems

Develops EDA software, IP, verification tools

Cadence Design Systems supplies software, hardware, and IP for electronic design automation (EDA) to help customers create advanced semiconductor chips and electronic systems. Its tools handle system design, verification, digital and analog IC design, and custom flows, while IP such as Tensilica processors and DSP cores can be licensed for integration into customer products. The offerings are delivered as software licenses with maintenance and support, plus IP licensing and occasional hardware-accelerated options. The company differentiates itself with a broad, end-to-end EDA portfolio and close collaboration with industry leaders to streamline the path from concept to silicon, aiming to help customers bring sophisticated silicon and electronics to market faster with lower risk and higher productivity.

Company size
10,001+
Company stage
IPO
Headquarters
San Jose, CA
Founded
1988

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