Q

Qualcomm

Designs mobile chips and licenses wireless patents

Lead Layout Engineer - Layout Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

  • A bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or a related field and at least 3 years of relevant custom layout design experience, or related work experience.
  • An associate's degree in Computer Science, Mathematics, Electrical Engineering, or a related field and at least 5 years of relevant custom layout design experience, or related work experience.
  • A high school diploma or equivalent and at least 7 years of relevant custom layout design experience, or related work experience.
  • At least 3 years of experience using layout design and verification tools such as Cadence, LVS, and RMAP.
  • Advanced degrees in a relevant field may substitute for up to two years of general custom layout design experience; a master's degree substitutes for one year and a doctorate for two years.
  • Hands-on experience with various Power Management Module layouts and physical verification using the Calibre Verification Suite.
  • Extensive floorplanning and signal-planning skills in Cadence Virtuoso IC201 or later.
  • Strong understanding of submicron, deep-submicron, and high-voltage CMOS processes; SOI process knowledge is an advantage.
  • Strong analog layout fundamentals and basic electrical knowledge for layout development.
  • Strong physical verification debugging capability using the Calibre Verification Suite.
  • Strong problem-solving skills and the ability to create area- and parasitic-efficient layouts.
  • Organizational skills and the ability to multitask.
  • Communication skills for efficient delivery.
  • Ability to work with geographically distributed team members.
  • Graduation in Electrical or Electronics is preferred, with at least 5 years of experience; alternatively, a diploma with at least 8 years of hands-on layout development experience is acceptable.

Responsibilities

  • Develop block-, macro-, or chip-level layouts and floorplans according to project requirements, specifications, and design schematics.
  • Apply design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs.
  • Conduct analyses and tests and verify designs using tools and techniques to identify and troubleshoot issues.
  • Stay current with new verification methods.
  • Work with internal and external stakeholders to align on projects, provide updates, and resolve issues.
  • Design layouts for analog circuits including linear and switching regulators, ADCs, DACs, chargers, envelope trackers, APTs, high-current power FETs, OTAs, and error amplifiers.
  • Create technical documentation and presentations.
  • Work effectively in a dynamic, team-oriented environment.

Desired Qualifications

  • Knowledge of the SOI process.
  • Scripting knowledge in SKILL, Perl, or shell.
  • Hands-on knowledge of AI-based layout development workflows.

About the Company

Qualcomm

Designs mobile chips and licenses wireless patents

Qualcomm designs the Snapdragon processors and modems inside many Android phones, and it licenses its wireless patents to device makers around the world. It helped commercialize CDMA, the cellular technology behind 3G networks, and its patents cover core parts of the 4G and 5G standards that phones use to connect. The company does not run its own chip factories; contract foundries make its chips, which it sells to makers of phones, PCs, cars, and connected devices. Device makers also pay Qualcomm royalties for using its patented technology, which forms a second business alongside chip sales. Qualcomm was founded in 1985 and is based in San Diego, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Diego, CA
Founded
1985

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