Xora Innovation

Funding AI and deep tech ventures

Head of Memory Architecture

Silicon & ASIC DesignConfirmed live in the last 24 hours

Full-timeSan Jose, CA, USANo salary listed

About the Job

Requirements

A preferred M.S. or Ph.D. in Computer Science, Computer Engineering, or Electrical Engineering.
At least 10 years of experience in memory architecture, preferably at leading memory integrated device manufacturers.
Deep understanding of state-of-the-art memory issues and challenges, particularly those associated with Agentic AI inference computing.
Experience with power, performance, area, and cost analysis and modeling.
A broad network of relevant industry and academic experts to deepen understanding and evangelize the memory offering.

Responsibilities

Balance memory footprint, bandwidth, latency, power efficiency, density, silicon area, and cost per bit.
Design memory vaults and hierarchies, on-chip interconnects, sense amplifiers, and address translation, emphasizing high granularity and bandwidth.
Analyze state-of-the-art Agentic AI inference applications, software, AI inference models, leading-edge systems-on-chip for data center workloads, and their interactions with memory to reduce bottlenecks.
Benchmark leading-edge AI inference systems-on-chip architectures and workload-management specifics against competing memory architectures and devices, including the company's memory solution.
Understand and leverage the company's core materials and device technology to realize a category-defining memory for inference computing.
Partner with systems-on-chip architects, new product introduction teams, silicon design teams, and technology teams to accelerate the product's time to market.
Lead the architectural design of a purpose-built memory product for AI inference computing, designing, modeling, and optimizing its memory subsystems.

Head of Memory Architecture (Xora Portfolio Company)

Xora Innovation · San Jose, United States (Hybrid) · Full-time · Posted 2026-10-12

Workplace: hybrid

Department: XVL

Description

ABOUT THE COMPANY

We are a Silicon Valley, San Jose based stealth start-up and are looking for a passionate, ambitious individual who shares our vision of next generation disruptive memory solutions for Agentic AI inference and high performance data center computing applications.

This is an impactful and senior leadership role allowing you to mastermind the realization of our strategic ambitions and shape the direction of our product portfolio development.

ABOUT THE ROLE

In your role as Head of Memory Architecture, you will lead the architectural design of our disruptive product which is a purpose-built memory for AI inference computing, building on your extensive knowledge and industry experience combined with our proprietary in-house device technology capabilities. It is a senior engineering role responsible for designing, modeling, and optimizing the memory subsystems for a new memory category and product for AI inference computing. Close collaboration with device technology and commercial development teams is an essential element of this role.

CORE RESPONSIBILITIES

Architecture & Trade-off Analysis: Balance memory footprint, bandwidth, latency, power efficiency, density, silicon area, and cost/bit.
Subsystem Design: Design memory vaults and hierarchies, on-chip interconnects, sense amplifiers and address translation with emphasis on high granularity and bandwidth
Workload Optimization: Analyze state-of-the-art Agentic AI inference applications, software, AI inference models, leading edge SOCs for data center workloads and how they interact with memory to reduce bottlenecks. Benchmark leading edge AI inference SOC architectures and workload management specifics vis a vis competing memory architectures and devices including our disruptive memory solution.
Novel Bit Cell and Device Architectures: Ability to understand and leverage our core materials and device technology to realize a category defining memory for inference computing
Cross-Functional Collaboration: Partner with SOC architects, NPI teams, silicon design and technology teams to drive acceleration of the product to market.

REQUIRED QUALIFICATIONS & SKILLS

Education: M.S. or Ph.D. in Computer Science (CS), Computer Engineering (CE), or Electrical Engineering (EE) preferred.
Experience: 10+ years in memory architecture, preferably the leading memory IDMs.
Technical Knowledge:
Deep grasp of state-of-the-art memory issues and challenges particularly associated with Agentic AI inference computing.
Power, performance, area and cost (PPAC) analysis and modeling.
Network Connections: Broad network of relevant industry and academia experts to deepen our understanding and to evangelize our memory offering.

Apply

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About the Company

Xora Innovation

Funding AI and deep tech ventures

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Company size: 11-50
Company stage: Not listed
Total funding: $1.8B
Headquarters: Singapore, Singapore
Founded: 2019

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