Design Verification Engineer - ASICS Engineering

Qualcomm is a company of inventors whosebreakthroughinnovationsare accelerating progressin data center technologies, connectivity, and new possibilities thatare transformingindustries,creating opportunities, andenrichinglives.Bringing this potential to life requiresinventive minds with diverse skills, backgrounds, andperspectives to developworld-changing technologies and products. This is the Invention Age—and this is where youcan make an impact.

The QualcommGSoCHW team develops and delivers innovative, best-in-class products across advancedcomputeand connectivity domains. As part of the Global SoC organization, ourASIC Design Verification Engineersbring deepexpertiseinCPUs, memory systems, High Bandwidth Compute (HBC), AIinference acceleration, andASIC design and verification fundamentals, along with a strongdrive tocreatenew solutions.This role offers a unique opportunity to make a meaningful impact on next-generation product lines, from data center solutions to AI/ML and autonomous driving technologies. You will join an exceptional global engineering team dedicated to pushing the boundaries of what is possible today and defining the platforms of the future.

Job Overview

We arelooking forhighly motivated new college graduates and experienced Design Verification Engineers to join ourGSoCDesign Verification team. In this role, you willverifynext-generation Data Center SoCs that power AI, high-performance computing, mobile, and cloud infrastructure products. You willpartnerclosely with architects, design engineers, software teams, and verification specialists tobuildscalable verification solutions, drive verification closure, andsupportfirst-silicon success for complex SoC designs.

Thisroleprovidesthe opportunity to work onadvancedtechnologiessuch asmulti-core CPUs, cache coherency systems, memory subsystems, AI/ML accelerators, high-speed interconnects, security, andmodernSoCarchitecture.

As an SOC Verification Engineer, you willbe responsible forensuring the quality and functionality of System-on-Chip (SOC) designs through comprehensive verification processes. You will develop and implement verification methodologies, create test plans, and execute verification tests toidentifyand resolve design issues.Additionallyin this role, you willalsohelpbuildthe AI-powered intelligent agents thatassistengineers in areas such as Design Verification, regression management, debug automation, test planning, and design analysis.

Key Responsibilities:

• Develop and execute comprehensive verification plans for SoC, subsystem, and IP-level features. 

• Design and implement scalable System Verilog/UVM-based and Processor-based verification environments. 

• Create directed and constrained-random test scenarios to validate functionality and architectural use cases.

• Develop assertions, functional coverage models, and checkers. 

• Debug RTL, testbench, and integration issues and work closely with design teams to resolve defects. 

• Drive coverage closure using functional and code coverage metrics. 

• Participate in architecture and design reviews to ensure verification requirements are incorporated early in the development cycle. 

• Verify complex Data Center SoC features.

• Support emulation and acceleration-based verification whenrequired. 

• Contribute tomethodologyimprovements, automation, reusable verification components, and AI-assisted verification flows.

• Develop AI agents that automate engineering tasks acrossdomainsworkflows. 

• Build agent workflows using modern LLM frameworks and agent orchestration platforms.

• Create integrations between AI systems and engineering tools, databases, and knowledge repositories. 

• Develop Retrieval Augmented Generation (RAG) pipelines forsystemdocumentation, specifications, and engineering knowledge.

Qualifications

• Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or related field.

• Strong knowledge of: System Verilog, UVM, C, Assertion-Based Verification (SVA), Coverage-Driven Verification, System level Use case verification

• Experience developing verification environments from architecture/specification through signoff.

• Strong understanding of computer architecture and digital design fundamentals.

• Experience debugging complex SoC-level issues.

• Strong problem-solving and analytical skills.

• Proficiencyin Python or scripting languages for automation.

• AI-assisted verification of workflows and test generation. 

• Excellent communication and collaboration skills.

Preferred Qualifications

• Experience in full-chip or subsystem verification environments.

• Experience with one or more of the following: 

• CPU verification

• Cache coherency protocols (ACE, CHI, CXL)

• DDR or HBM memory systems

• PCIe, Ethernet, or networking protocols

• AI/ML acceleratordesignverification

• Security and RAS feature verification

• SystemPower andPerformance verification

• Experience with: Portable Stimulus (PSS),Formal Verification,Emulation platforms (Veloce/Palladium/ZeBu),Power-aware verification

• Understanding of machine learning and Generative AI concepts. 

• Knowledge of LLMs such as GPT, Claude, Llama, or equivalent models. 

• Collaborate with RTL, DV, CAD, and AI platform teams toidentifyautomation opportunities. 

• Measure and track productivity improvements delivered through AI-enabled workflows. 

• Contribute to internal AI platforms, reusable skills, tools, and agent libraries.