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Cadence Design Systems

Develops EDA software, IP, verification tools

Lead Software Engineer - AI/LLM for Virtuoso

AI Application EngineeringConfirmed live in the last 24 hours
Full-timeBeijing, ChinaNo salary listedIn-person

About the Job

Requirements

  • A Master of Science or PhD in Computer Science or Computer Engineering is required.
  • Strong software engineering fundamentals, including design, refactoring, debugging, and testing of complex applications, are required.
  • Familiarity with test-driven development and designing componentized, modular software using minimalist design principles is required.
  • A demonstrated history of developing new software and refactoring existing code bases is required.
  • Proficiency in Python and C++ is required.
  • Proficiency in written and spoken English for cross-site collaboration is required.
  • A computer science background sufficient to design and deploy production software systems using machine learning and large language model technology is required.
  • A desire to develop and deploy next-generation production electronic design automation tools is required.

Responsibilities

  • Design and implement new software features and interfaces in the Cadence Virtuoso platform.
  • Contribute to continuous integration, unit testing, and code quality processes using modern C++ paradigms and AI-assisted development workflows.
  • Collaborate with cross-functional engineering teams across time zones to deliver production-quality simulation technologies.
  • Innovate in using AI technology within an electronic design automation software framework and advance agentic AI within those frameworks; developing new machine learning models is not part of the role.

Desired Qualifications

  • Experience with unit testing and code review processes.
  • Ability to integrate AI tools into engineering workflows to enhance productivity and code quality.
  • A basic background in machine learning, data pipelines, predictive modeling, and deployment.
  • Practical knowledge of frontier large language models, such as DeepSeek, Qwen, and GPT/Claude families, and how model choices affect latency, cost, and reliability.
  • Familiarity with agent architecture concepts such as ReAct reason-act loops, planning, evaluation, self-correction, and persistent memory design; frameworks such as LangChain, Dify, and Coze; Model Context Protocol; function and tool calling; and structured outputs.
  • Understanding of retrieval-augmented generation, retrieval pipelines, embeddings, chunking, and grounding.
  • Familiarity with context engineering to produce consistent, predictable outputs despite changing large language model behavior.
  • Familiarity with China's AI governance framework and data privacy regulations, including PIPL.
  • Familiarity with electronic design automation tools used for analog circuit design.

About the Company

Cadence Design Systems

Develops EDA software, IP, verification tools

Cadence Design Systems supplies software, hardware, and IP for electronic design automation (EDA) to help customers create advanced semiconductor chips and electronic systems. Its tools handle system design, verification, digital and analog IC design, and custom flows, while IP such as Tensilica processors and DSP cores can be licensed for integration into customer products. The offerings are delivered as software licenses with maintenance and support, plus IP licensing and occasional hardware-accelerated options. The company differentiates itself with a broad, end-to-end EDA portfolio and close collaboration with industry leaders to streamline the path from concept to silicon, aiming to help customers bring sophisticated silicon and electronics to market faster with lower risk and higher productivity.

Company size
10,001+
Company stage
IPO
Headquarters
San Jose, CA
Founded
1988

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