Emulation Performance/Debug Engineer - ASICS Engineering

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.  

Qualcomm's Emulation Team is part of the central SoC digital hardware organization responsible for the overall development and support of SoC pre-silicon platforms. The Emulation team works closely with architects, designers, verification engineers, software engineers, and customers. The team is currently seeking candidates with experience in the following technical disciplines, languages, and methodologies: 
 

• Emulation Platforms (FPGA Prototyping, Veloce, Palladium), Emulation tools (Synthesis, Place and Route, Constraints, Clocking, Timing Closure), System Debug (Waveform generation and Content Debug support) 

• SoC Functionality (CPU/DSP Core, Multimedia, IO, Peripherals, DDR, Modem, Bus Protocols)

Preferred Requirements:

• 5+ years of experience working in emulation and silicon environments. Candidates are expected to have experience in:

• Design, development, and deployment of uniform global methodologies for emulation build generation and debug across FPGA based emulation platforms of various configurations

• Cross-site collaboration, vendor engagements, and executive communication

• Pre-silicon prototyping for new SoC designs, including pre-silicon enablement and bring-up

• Bring-up of new FPGA emulation/prototyping hardware and software

• Debugging low level software and hardware issues

• Debug tools including JTAG and kernel debuggers

• Validation and debug of digital circuits

• CPU and SoC architectures, with solid understanding of SoC building blocks (interconnects, power management, PMIC, NoC, peripherals)

• Basic understanding of power and performance

• Expertise in Verilog / SystemVerilog 

• Experience with C programming

• Scripting: Proficient in Python, TCL

• FPGA Expertise:  Xilinx/Intel FPGAs, Tools, and timing closure techniques

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

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EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$121,800.00 - $182,600.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm.  We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).  In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.