Q

Qualcomm

Designs mobile chips and licenses wireless patents

Digital Signal Processing / Neural Processing Unit Design Verification Senior Staff Engineer - Hardware Engineering

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

  • A Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 6 or more years of Hardware Engineering or related work experience; or a Master's degree in those fields and 5 or more years of related experience; or a PhD in those fields and 4 or more years of related experience.
  • At least 12 years of experience in processor or ASIC design verification.
  • A solid background in digital design, processor architecture, processor verification, and power-aware verification.
  • Expertise in SystemVerilog testbench architecture and implementation.
  • Strong analytical and debugging skills, solid knowledge of digital design, and a good understanding of object-oriented programming concepts.
  • Interpersonal and communication skills.

Responsibilities

  • Drive design verification of DSP IP in collaboration with a global DSP design team, including architecture, implementation, power, post-silicon, and back-end teams.
  • Implement and improve SystemVerilog/UVM testbench architecture.
  • Develop and deploy verification methodologies and automation to improve quality and efficiency.
  • Develop design-specific test plans, architect and develop verification environments, and meet coverage goals.
  • Perform hands-on simulations and debug IP-, subsystem-, and SoC-level failures and bugs.
  • Complete all required IP-level verification activities to support product quality and commercial success.
  • Use assertions, simulation, formal verification (static property checking), hardware-software co-verification, constraint/HVL-based verification, simulation acceleration, and emulation.
  • Bring up gate-level simulations and perform gate-level verification with timing simulations.
  • Perform power-aware RTL verification and gate-level simulation.

Desired Qualifications

  • Experience writing C-based and assembly-level test cases.
  • Exposure to power-aware implementation and verification using UPF.
  • Experience with advanced verification techniques such as formal verification and assertions.
  • Experience with gate-level simulation and debugging, including zero-delay, timing-annotated, and power-aware simulation.
  • Experience with SystemVerilog/UVM and simulators from Synopsys, Mentor, or Cadence.
  • Scripting and automation skills using Perl, Python, Shell, and Makefile TCI.
  • Experience with hardware verification languages such as SystemVerilog testbench (OVM/UVM) and SystemC, and hardware description languages such as Verilog and SystemVerilog.
  • Experience verifying processor subsystems.
  • Experience creating validation suites and building automation.

About the Company

Qualcomm

Designs mobile chips and licenses wireless patents

Qualcomm designs the Snapdragon processors and modems inside many Android phones, and it licenses its wireless patents to device makers around the world. It helped commercialize CDMA, the cellular technology behind 3G networks, and its patents cover core parts of the 4G and 5G standards that phones use to connect. The company does not run its own chip factories; contract foundries make its chips, which it sells to makers of phones, PCs, cars, and connected devices. Device makers also pay Qualcomm royalties for using its patented technology, which forms a second business alongside chip sales. Qualcomm was founded in 1985 and is based in San Diego, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Diego, CA
Founded
1985

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