Staff Mixed Signal IC Design Engineer - ASICS Engineering

Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Overview

Qualcomm is a global leader in next‑generation wireless and multimedia technologies, committed to delivering world‑class products that elevate user experiences across the industry. We are seeking a dynamic and forward‑thinking Sensor Design Engineer to join our Fingerprint Sensor team and drive the development of innovative biometric solutions for future mobile devices. In this role, you will leverage advanced CMOS mixed‑signal integrated circuit design methodologies to architect and develop cutting‑edge fingerprint sensor technologies that push the boundaries of performance, reliability, and integration.

About the Team

Qualcomm’s Fingerprint Sensor Design Team develops next‑generation biometric solutions, including under‑display fingerprint sensors and advanced sensing technologies for various platen architectures. We are seeking a highly motivated engineer with deep expertise in CMOS mixed‑signal integrated circuit design to contribute to the development of cutting‑edge sensor architectures. In this role, you will help define system‑level specifications, architect mixed‑signal blocks, and drive circuit‑level design and verification for innovative fingerprint sensor products.

Key Responsibilities

• Lead and contribute to the definition, design, verification, and documentation of advanced fingerprint sensors using LTPS TFT backplanes.
• Translate system‑level requirements into sensor architectures, circuit specifications, and optimized sensor designs.
• Execute sensor circuit‑ and pixel‑level simulations using Cadence ADE/Spectre, HSPICE, MATLAB, and other industry‑standard tools to validate performance across corners and drive iterative improvements.
• Participate in full‑cycle development, including system modeling, sensor pixel design, driver circuit design, and optimization across key performance metrics.
• Perform system‑level studies such as architecture exploration, fundamental physics analysis, and performance trade‑off evaluations.
• Guide and review pixel‑level and block‑level layout to ensure performance, area efficiency, manufacturability, and reliability.
• Debug circuit, pixel, and system‑level issues; refine designs based on insights from simulation tools and sensor characterization.
• Support sensor bring‑up through lab measurements, functional validation, and correlation between sensor behavior and simulation models.
• Collaborate with system, firmware, product, and test engineering teams to achieve optimal sensor and system‑level performance.
• Prepare clear technical documentation, design descriptions, and test materials for internal stakeholders and external partners.
• Contribute innovative ideas to advance fingerprint sensor architecture, improve pixel and circuit performance, and enhance overall product capabilities.

Minimum Qualifications

• Education: Master's degree in Science, Engineering, or related field.
• Experience:
  • 2+ years of professional experience or
  • 3+ years of graduate research experience in analog or mixed-signal IC design, verification, or related fields.
• Tools: Hands-on experience using CADENCE, SPICE, MATLAB, Verilog/VHDL, or equivalent.

Preferred Qualifications

• Education: Ph.D. in Electrical Engineering or a related field.
• Experience: 2+ years of experience in mixed-signal CMOS circuit design, CMOS sensor design, or related areas.
• Experience with CMOS sensor design with TFT/LTPS technologies
• Strong background in semiconductor device physics

Keywords

Analog, Mixed-Signal, CMOS Circuit, CMOS sensor, Image Sensor, CMOS Pixel, TFT, LTPS

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

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