A

Apple

Designs phones, computers and their operating systems

Physical Design Engineer

Silicon & ASIC DesignPosted on Nov 5
Full-time$174.1k - $225.3k /yr

About the Job

Requirements

  • A Master’s degree or foreign equivalent in Electrical, Electrical and Computer Engineering, or a related field.
  • Experience or education must include utilizing PNR tools such as ICC, ICC2, or Innovus for place-and-route work, including floor planning, placement, clock optimization, routing, and timing and power optimization for SoC partitions.
  • Experience or education must include end-to-end understanding of digital design implementation fundamentals, logic modeling, and hardware description languages supporting digital IC design.
  • Experience or education must include utilizing TCL, Perl, Python, and Unix scripting to summarize data, improve execution efficiency, and implement custom scripts for partition closure.
  • Experience or education must include understanding PD construction and analysis flow and methodologies to execute, close, and sign off SoC partitions.
  • Experience or education must include understanding transistors and digital circuits to meet specific requirements and make appropriate implementation, closure, and signoff trade-offs.
  • Experience or education must include understanding digital logic and computer architecture fundamentals relevant to partitioning and resource planning in integrated circuits.
  • Experience or education must include understanding results from physical verification tools such as Calibre and generating fixes to address violations.
  • Experience or education must include knowledge of signal behavior, interference effects, and noise reduction principles relevant to high-speed digital circuits.

Responsibilities

  • Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.
  • Complete netlist-to-GDS2 implementation for partitions to meet schedule and design goals.
  • Be responsible for timing, physical, and electrical verification and drive signoff closure for partitions.
  • Resolve physical design and flow issues, identify potential solutions, and drive execution.
  • Act as a focal point for place and route by driving work among place-and-route engineers, setting goals and milestones, planning short- and long-term work, and understanding dependencies across top-level design, static timing analysis, and block place and route.
  • Work with the physical design team to drive methodologies and best-known methods, develop guidelines and checklists, drive execution, and track progress.
  • Drive timing closure through physical synthesis and place-and-route tools and work with ASIC vendors.
  • Drive front-end and back-end implementation from RTL to GDS2, including synthesis, formal verification, floor planning, netlisting, timing constraints, timing and power convergence, and engineering change order implementation.
  • Perform hands-on physical implementation and timing closure of core platforms and SoCs.
  • Streamline timing signoff criteria, timing analysis methodologies, and flows, and develop or enhance engineering change order generation scripts for timing closure.
  • Perform floor planning, physical synthesis, and physical design closure for large, complex designs at 1 GHz or higher clock frequencies.
  • Drive physical design and timing convergence for high-frequency, low-power designs at block, cluster, and/or full-chip level.

About the Company

Apple

Designs phones, computers and their operating systems

Apple designs and sells consumer electronics, from iPhone smartphones and Mac computers to tablets and wearable devices. Its operating systems manage apps and built-in functions for communication and work, while iCloud stores files and synchronizes data across devices. Customers buy additional digital services through subscriptions such as Apple Music and Apple TV, and developers distribute software through the App Store. Apple earns money from hardware sales, subscriptions and digital transactions, selling directly to customers and through retailers and mobile carriers around the world. It was founded in 1976 and has its headquarters in Cupertino, California.

Company size
10,001+
Company stage
IPO
Headquarters
Cupertino, CA
Founded
1976

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