Q

Qualcomm

Designs mobile chips and licenses wireless patents

Mask Layout Designer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeMarkham, ON, CanadaIn-person

About the Job

Requirements

  • A bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or a related field and 4 or more years of experience designing custom layouts in a relevant domain, or related work experience; alternatively, an associate's degree in Computer Science, Mathematics, Electrical Engineering, or a related field and 6 or more years of such experience; or a high school diploma or equivalent and 8 or more years of such experience.
  • At least 4 years of experience using layout design and verification tools such as Cadence, LVS, or rmap.
  • At least 2 years in a technical leadership role, with or without direct reports.
  • At least 3 years of work experience in a role requiring interaction with senior leadership, such as Senior Director level and above.
  • At least 1 year of experience working with operating budgets and/or project financials.
  • At least 1 year in a leadership role with direct reports, applicable only to those with direct reports.

Responsibilities

  • Develop block-, macro-, or chip-level layouts and floorplans according to project requirements, specifications, and design schematics.
  • Apply design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs.
  • Conduct analyses, tests, and design verification using tools and techniques to identify and troubleshoot issues, and stay current with new verification methods.
  • Work with internal and external stakeholders to align on projects, provide updates, and resolve issues.
  • Lead the team in interpreting complex project requirements, specifications, and schematics to determine macro-level layout needs.
  • Lead the definition and development of macro-level layouts and floorplans using knowledge of layout techniques, design elements, project requirements such as PPA and yield, and electronic principles such as current, resistance, and parasitics.
  • Develop and communicate guidelines, processes, design-rule manuals, and checklists across teams, and recommend improvements to support accurate, high-quality designs that meet standards.
  • Manage testing and validation of top-level designs against specifications using layout and verification tools such as Cadence, LVS, and rmap; identify errors and ensure layouts can be manufactured.
  • Guide information gathering and conduct advanced analyses and sign-off to identify issues; help the team troubleshoot and debug complex technical issues.
  • Develop new work methods and improve or automate existing methods to increase team efficiency, and help others learn new approaches.
  • Apply knowledge of industry trends and developments in mask layout tools and techniques, integrate advancements into the work, and help the team do the same.
  • Re-scope projects, identify and reassign resources, and review team members' work to address changing timelines or priorities.
  • Lead team management of priorities, deadlines, and deliverables for mid- to large-sized projects, and lead multiple projects.
  • Collaborate with internal teams, including engineers, program management, and business operations, and external stakeholders, including PVERF, PDCAD, QDA, foundry, and SoC, to identify needs, share updates, and resolve complex issues promptly.
  • Work independently with little supervision and provide supervision to direct reports.
  • Communicate complex or detailed information verbally and in writing to audiences with differing knowledge levels; the role may involve negotiation, influence, and communication with large groups or high-level constituents.
  • Influence key organizational decisions and be consulted by senior leadership.
  • Determine appropriate approaches to tasks that often lack defined steps, using multiple mental abilities; mistakes may result in significant rework.
  • Develop creative processes, procedures, or work products within guidelines to achieve objectives.
  • Use deductive and inductive problem-solving, including advanced data analysis and interpretation, to resolve problems where information may be missing or conflicting.
  • Occasionally participate in strategic planning within the role's area that affects immediate operations.

Desired Qualifications

  • A master's degree in Technology, Electrical Engineering, Electronic Engineering, or a related field.
  • At least 6 years of experience designing custom layouts in a specific relevant technology such as FINFET, CMOS, or gate array.
  • At least 6 years of experience designing custom layouts in a relevant domain such as analog, mixed signal, RF, or digital design.

About the Company

Qualcomm

Designs mobile chips and licenses wireless patents

Qualcomm designs the Snapdragon processors and modems inside many Android phones, and it licenses its wireless patents to device makers around the world. It helped commercialize CDMA, the cellular technology behind 3G networks, and its patents cover core parts of the 4G and 5G standards that phones use to connect. The company does not run its own chip factories; contract foundries make its chips, which it sells to makers of phones, PCs, cars, and connected devices. Device makers also pay Qualcomm royalties for using its patented technology, which forms a second business alongside chip sales. Qualcomm was founded in 1985 and is based in San Diego, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Diego, CA
Founded
1985

Recently Posted Jobs

Explore more opportunities at Qualcomm

See more jobs