Cadence Design Systems

Develops EDA software, IP, verification tools

Lead Customer Engagement Engineer

Solution EngineeringConfirmed live in the last 24 hours

Full-timeSan Jose, CA, USA

About the Job

Requirements

A Bachelor of Science in Electrical Engineering or Computer Engineering is required; a Master of Science in either field is preferred.
At least 5 years of experience in design and/or verification of complex digital designs, or in an applications engineering or technical support role.
Strong knowledge of design-debug techniques and logic design.
Knowledge of verification methodologies for complex electronic design automation environments.
Proficiency in Verilog, SystemVerilog, and VHDL, with the ability to create test cases that quickly reproduce customer issues.
Proficiency in Unix/Linux scripting languages, including ksh, bash, or csh.
Proficiency in PCIe, USB, and Ethernet protocols.
Proficiency in TBA, SVA, SystemVerilog coverage, and Low Power (UPF).
Ability to communicate complex issues clearly and concisely to internal teams and customers.

Responsibilities

Take ownership of product issues reported by field application engineers and customers and drive them to resolution.
Debug customer-reported failures, produce test cases to replicate failures, and log issues with HSV R&D teams.
Recommend workarounds or application-level solutions to customers when necessary.
Test R&D fixes and patches.
Work with customers and internal groups to specify enhancement requests.
Test new product features for future software releases or hardware platforms, including participating in internal beta activities.
Travel occasionally, as needed, to resolve critical customer issues.

Desired Qualifications

Experience with UVM.
Experience with emulation and Cadence’s Palladium product.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As an integral member of the HSV Customer Support Team, you will work with our customers and field AE teams and R&D groups to provide technical support for our Palladium, Protium and Virtual Protocol (PDAPP) products. You will enjoy the experience and challenge in working with a broad spectrum of designs and customers.

Responsibilities includes:

Taking ownership and quickly drive to resolution product issues reported by field AEs and customers.
Debug customer reported failures, produce test cases to replicate failure and log issues with HSV R&D teams.
Recommend potential workaround or application level solutions to customers when necessary.
Test R&D fixes/patches.
Work with customer and internal groups to spec out enhancement requests.
Testing new product features for future s/w releases or h/w platform, including participation in internal beta activities.

Position Requirements:

Requires a BS-EE/CE (MS-EE/CE preferred) with a minimum of 5 years experience in design and/or verification of complex digital designs, or Applications engineering/technical support role.
Strong knowledge of design debug techniques and a strong understanding in logic design.
Knowledgeable in verification methodologies for complex EDA environments.
Proficiency in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customer issues quickly.
Proficiency in Unix/Linux scripting languages (ksh/bash/csh).
Proficiency in PCIe, USB and Ethernet protocol.
Proficiency in TBA, SVA, SV coverage, Low Power(UPF). UVM experience is a plus.
Experience with emulation, Cadence's Palladium product preferred.
Excellent communication skills. Must have ability to communicate complex issue to internal teams and customers in a clear and concise manner.
Occasional travel may be required to resolve critical customer issues.

The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

About the Company

Cadence Design Systems

Develops EDA software, IP, verification tools

Cadence Design Systems supplies software, hardware, and IP for electronic design automation (EDA) to help customers create advanced semiconductor chips and electronic systems. Its tools handle system design, verification, digital and analog IC design, and custom flows, while IP such as Tensilica processors and DSP cores can be licensed for integration into customer products. The offerings are delivered as software licenses with maintenance and support, plus IP licensing and occasional hardware-accelerated options. The company differentiates itself with a broad, end-to-end EDA portfolio and close collaboration with industry leaders to streamline the path from concept to silicon, aiming to help customers bring sophisticated silicon and electronics to market faster with lower risk and higher productivity.

Company size: 10,001+
Company stage: IPO
Headquarters: San Jose, CA
Founded: 1988

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