Q

Qualcomm

Designs mobile chips and licenses wireless patents

RTL Design Senior Engineer/Senior Lead - Hardware Engineering

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

  • Good understanding of low-power microarchitecture techniques and artificial intelligence/machine learning systems.
  • Thorough knowledge of computer system architecture, including design aspects of artificial intelligence/machine learning designs.
  • Experience with high-performance design techniques and trade-offs in computer microarchitecture.
  • Good understanding of network-on-chip design principles.
  • Knowledge of defining performance measures such as bandwidth and latency, and sizing bus transactions based on use cases across voltage/frequency corners.
  • Knowledge of Verilog and SystemVerilog, simulators, and waveform debugging tools.
  • Knowledge of logic design principles and their timing and power implications.
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 3+ years of hardware engineering or related work experience; or a master's degree in those fields and 2+ years; or a PhD in those fields and 1+ year.
  • Preferred: master's or bachelor's degree in Electronics or Electrical Engineering or equivalent.
  • Preferred: at least 2+ years of experience working on multiple designs.

Responsibilities

  • Interact closely with the product definition and architecture team.
  • Develop implementation strategies, including microarchitecture and coding, to meet quality and PPAS (Performance, Power, Area, Schedule) goals for the subsystem.
  • Define block-level design aspects, including block diagrams, interfaces, clocking, transaction flow, pipelines, and low power.
  • Perform and lead a team of engineers on RTL coding for subsystem/SoC integration and function/performance simulation debugging.
  • Drive Lint, CDC, FV, and UPF checks to ensure design quality.
  • Develop assertions as part of white-box testing coverage.
  • Work with stakeholders to discuss collateral quality and identify solutions or workarounds.
  • Deliver key design collateral, including timing constraints and UPF.
  • Work with Power and Synthesis teams on use cases, dynamic power, and datapath interactions.
  • Work with SoC DFT and PD teams as part of collateral exchanges.

Desired Qualifications

  • Good understanding of low-power microarchitecture techniques and artificial intelligence/machine learning systems.
  • Thorough knowledge of computer system architecture, including design aspects of artificial intelligence/machine learning designs.
  • Experience with high-performance design techniques and trade-offs in computer microarchitecture.
  • Good understanding of network-on-chip design principles.
  • Master's or bachelor's degree in Electronics or Electrical Engineering or equivalent.
  • At least 2+ years of experience working on multiple designs.

About the Company

Qualcomm

Designs mobile chips and licenses wireless patents

Qualcomm designs the Snapdragon processors and modems inside many Android phones, and it licenses its wireless patents to device makers around the world. It helped commercialize CDMA, the cellular technology behind 3G networks, and its patents cover core parts of the 4G and 5G standards that phones use to connect. The company does not run its own chip factories; contract foundries make its chips, which it sells to makers of phones, PCs, cars, and connected devices. Device makers also pay Qualcomm royalties for using its patented technology, which forms a second business alongside chip sales. Qualcomm was founded in 1985 and is based in San Diego, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Diego, CA
Founded
1985

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