Layout Designer
Cadence Design Systems
Layout Designer
Cadence Design Systems
Develops EDA software, IP, verification tools
工作内容:
- 负责模拟电路的版图设计、版图验证;
- 分析Foundry所提供的工艺流程和设计规则,理解所用工艺器件的平面和纵向结构;
- 与设计工程师充分沟通,确保完全理解设计对版图的要求。
要求:
微电子,半导体物理等本科及以上学历,有较好的集成电路工艺基础和模拟电路基础。 熟练使用Cadence virtuoso进行版图设计。 能主动积极完成各种版图设计任务。 很好的沟通能力和团队合作能力。
Develops EDA software, IP, verification tools
Cadence Design Systems supplies software, hardware, and IP for electronic design automation (EDA) to help customers create advanced semiconductor chips and electronic systems. Its tools handle system design, verification, digital and analog IC design, and custom flows, while IP such as Tensilica processors and DSP cores can be licensed for integration into customer products. The offerings are delivered as software licenses with maintenance and support, plus IP licensing and occasional hardware-accelerated options. The company differentiates itself with a broad, end-to-end EDA portfolio and close collaboration with industry leaders to streamline the path from concept to silicon, aiming to help customers bring sophisticated silicon and electronics to market faster with lower risk and higher productivity.
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