Qualcomm

Designs mobile chips and licenses wireless patents

Staff Signal Integrity Engineer - Hardware Engineering

Board & Electronics DesignConfirmed live in the last 24 hours

Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

At least 12 years of experience in Signal Integrity, Power Integrity, or high-speed systems.
Proven ownership of multiple tapeouts or high-volume products.
Deep expertise in transmission line theory, electromagnetic fundamentals, Signal Integrity/Power Integrity interactions, and jitter/noise coupling.
Strong hands-on experience with HFSS, ADS, Sigrity, CST, SIwave, and HSPICE.
Strong hands-on measurement experience with VNA, TDR, and real-time scopes.
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and at least 4 years of Hardware Engineering or related work experience; or a master's degree in one of these fields and at least 3 years of such experience; or a PhD in one of these fields and at least 2 years of such experience.

Responsibilities

Own end-to-end Signal Integrity/Power Integrity closure for programs from pre-silicon through post-silicon and production.
Define design targets and layout design guidelines for all high-speed interfaces.
Influence architecture decisions early in the product lifecycle.
Ensure Signal Integrity/Power Integrity alignment with product performance, yield, power, and cost KPIs.
Drive new IP co-design across IC/IO/PHY, package, and PCB.
Ensure compliance with JEDEC, PCI-SIG, MIPI, and IEEE standards.
Influence power delivery network architecture definition at system and package level and provide optimum cost solutions.
Ensure cross-functional alignment and partner with SoC/PHY design teams, package engineering, board/system teams, and OEM/ODM ecosystem.
Lead design reviews and signoff decisions.
Represent Signal Integrity/Power Integrity in program reviews and leadership forums.
Define company-wide Signal Integrity/Power Integrity methodologies.
Drive correlation between pre-silicon models and silicon/lab data.
Lead debugging of eye collapse, jitter margin issues, crosstalk, power noise, and silicon-package-board interactions.
Drive adoption of best practices across programs.
Establish golden methods for system Signal Integrity/Power Integrity.
Mentor senior engineers across Signal Integrity/Power Integrity domains.
Drive Signal Integrity/Power Integrity for memory interfaces including LPDDR4/5/6; high-speed IO including PCIe Gen4/5/6/7, USB4, UFS, and 10G–112G+ PHYs; MIPI CSI/DSI camera/display interfaces; and system power delivery network.
Plan, design, optimize, verify, and test electronic systems, circuits, mechanical systems, digital/analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems.
Bring up yield and collaborate with cross-functional teams to develop solutions and meet performance requirements.

Desired Qualifications

Experience with packaging technologies such as FCBGA and 2.5D/3D.
Experience with data center, compute, and server products.
Track record of patents, standards contributions, or published work at internal or external conferences.

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Title - Staff Signal Integrity Engineer

This role represents individual contributor within the CHS Signal Integrity organization responsible for end-to-end SI/PI architecture, analysis, and signoff for next-generation mobile, compute, Automotive and various other connectivity platforms.

The engineer acts as

System SI/PI owner across full platform (SoC ↔ package ↔ board ↔ connectors ↔ external systems)
Technical owner for high-speed interfaces and system margins
Cross-functional leader driving SIPI driven design convergence across silicon, package, and platform teams

Core Responsibilities

Own end-to-end SI/PI closure for programs (pre-silicon → post-silicon → production)
Define design targets and layout design guidelines for all high-speed interfaces
Influence architecture decisions early in product lifecycle
Ensure SI/PI alignment with product KPIs (performance, yield, power, cost)
Drive new IP co-design across IC/IO/PHY, package, and PCB
Ensure compliance to standards (JEDEC, PCI-SIG, MIPI, IEEE)
Influence PDN architecture definition at system and package level, provide related optimum cost solutions
Ensure cross functional alignments. Partner with SoC/PHY design teams, Package engineering, Board/system teams and OEM/ODM ecosystem
Lead design reviews and signoff decisions
Represent SI/PI in program reviews and leadership forums
Define company-wide SI/PI methodologies
Drive correlation between pre-silicon models and silicon/lab data
Lead debug of eye collapse / jitter margin issues, crosstalk and power noise and silicon-package-board interactions
Drive best practices adoption across programs
Establish golden methods for system SI/PI
Mentor senior engineers across SI/PI domains

High-Speed Interface Expertise

Drive SI/PI for interfaces such as:

Memory: LPDDR4/5/6
High-speed IO: PCIe Gen4/5/6/7, USB4, UFS, 10G–112G+ PHYs
Camera/Display: MIPI CSI/DSI
System PDN

Required Qualifications / Experience

12+ years in Signal Integrity / Power Integrity / High-speed systems
Proven ownership of multiple tapeouts or high-volume products

Domain Expertise

Deep expertise in Transmission line theory, EM fundamentals, SI/PI interactions and jitter/noise coupling. Strong hands-on experience with: Tools: HFSS, ADS, Sigrity, CST, SIwave, HSPICE; Measurement: VNA, TDR, real-time scopes

Preferred Differentiators

Experience with: Packaging technologies like FCBGA, 2.5D/3D; Products like Data center, Compute and Servers
Track record of Patents, standards contributions, or published work internal / external conferences

you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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If you would like more information about this role, please contact Qualcomm Careers.

About the Company

Qualcomm

Designs mobile chips and licenses wireless patents

Qualcomm designs the Snapdragon processors and modems inside many Android phones, and it licenses its wireless patents to device makers around the world. It helped commercialize CDMA, the cellular technology behind 3G networks, and its patents cover core parts of the 4G and 5G standards that phones use to connect. The company does not run its own chip factories; contract foundries make its chips, which it sells to makers of phones, PCs, cars, and connected devices. Device makers also pay Qualcomm royalties for using its patented technology, which forms a second business alongside chip sales. Qualcomm was founded in 1985 and is based in San Diego, California.

Company size: 10,001+
Company stage: IPO
Headquarters: San Diego, CA
Founded: 1985

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