Category	Tesla SI
Location	Palo Alto, California
Requisition ID	268248
Type	Full-time

Job Description

<p>The Tesla SI Hardware team is at the forefront of revolutionizing artificial intelligence through cutting-edge hardware innovation. Comprising brilliant engineers and visionaries, the team designs and develops advanced SI inference chips tailored to accelerate Tesla’s machine learning capabilities. A key part of this effort is Dojo, Tesla's custom supercomputer system built to efficiently train massive neural networks on vast video data from the fleet. The work of Tesla's SI Hardware team powers the neural networks behind Full Self-Driving (FSD), and Tesla humanoid robot, Optimus, pushing the boundaries of computational efficiency and performance. By creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in SI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life. Tesla's SI Hardware Team is looking for experienced, highly skilled VLSI engineers who enjoy working across the logic, circuit, methodology, and physical design levels. Our physical design team is growing to tackle a wider range of projects, building on our in-house SOC design expertise. This position entails the design, construction and integration of SOCs, IP, circuits, tool flows, and methodologies into systems using advanced technologies - from definition through characterization. </p><p>Our SI Hardware engineering team is designing next-generation chips using advanced 3D IC architectures with hybrid bonding technology. As a Staff Physical Design Engineer, you will own the physical implementation of complex multi-die stacks — from floorplan through signoff — at the leading edge of die-to-die integration. This role is critical to delivering chips that meet aggressive performance, power, and area targets using sub-micron interconnect pitches. </p>

Job Responsibilities

Own physical design implementation for 3D IC designs including floorplanning, bond pad assignment, and face-to-face or face-to-back die stacking using hybrid bonding
Implement and validate hybrid bond interface layouts, ensuring alignment with foundry design rules for copper-to-copper direct bonding
Design and verify TSV, micro-bump, and C4 bump interconnects for power delivery and I/O paths
Execute full physical design flow using Innovus, Synopsys 3DIC Compiler, and Calibre for layout generation and DRC/LVS signoff
Identify and resolve signal integrity, power integrity, and thermal challenges specific to hybrid bonded 3D stacks
Collaborate with packaging engineers and foundries to validate designs against process design kits and bonding process constraints
Leverage SI agents to automate and optimize physical design flows, layout checks, and signoff tasks

Job Requirements

Degree in Electrical Engineering, Computer Engineering, or related field, or equivalent work experience
7+ years in physical design with hands-on 3D IC and advanced packaging experience
Proficiency with Innovus, Synopsys 3DIC Compiler, and Calibre
Deep understanding of hybrid bonding interconnect technology, TSV design, micro-bumps, and C4 bumps
Working knowledge of signal integrity, power integrity, and thermal analysis in multi-die contexts
Ability to use SI agents to drive automation across physical design and signoff workflows

Tesla

Staff Physical Design - 3D Hybrid Bonding, SI Hardware

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Tesla

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