CPU PDN & EM/IR Sign-Off Engineer – Lead/Staff - Hardware Engineering

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Description :

• IR Signoff CPU/high performance cores

• Signal EM & Power EM Signoff for Chip TOP level & Block level CPU/DSP and other HM’s

• Development of PG Grid spec for different HM

• Validating the PG Grid using Grid Resistance & Secondary PG Resistance Checks

• Validating the IR Drops using Static IR , Dynamic IR Vless & VCD Checks for validating Die & Pkg Components of IR Drops.

• Experience in IO, Bump planning and RDL routing Strategy.

• Working with SOC and Packaging Teams on Bumps Assignments / RDL Enablement / Pkg Routing Optimizations to improve overall PDN Design.

• Partnering with EDA tool vendors and internal CAD teams to develop and enhance automation flows and methodologies for improving design efficiency.

• Good knowledge on PD would is desirable.

• Python , Perl , TCL.

Skill Set

• Hands on experience in PDN Signoff using Redhawk / RHSC / Voltus at block level / SOC Level.

• Good understanding on Power Integrity Signoff Checks.

• Proficient in scripting languages (Tcl and Perl).

• Familiarity with Innovus for RDL / Bump Planning/PG eco.

• Ability to communicate effectively with multiple global cross-functional teams.

• Tools : Redhawk , Redhawk_SC and basic use case of Innovus/ Fusion Compiler

• Power Planning/Floorplanning ,Physical Verification hands on experience is added advantage.

• LSF /compute optimization understanding.

Minimum Qualifications

Education:

• Bachelors - Electronics Engineering

Work Experiences:

• Years of experience : 4 to 10 years of realavant experience

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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If you would like more information about this role, please contact Qualcomm Careers.