Server Postsilicon Project Engineer - CPU Engineering

• 10+ years of experience in silicon, systems, hardware, or server product development or commercialization.
• 5+ years in a technical leadership role
• Experience in a post-silicon technical execution role driving one or more data-center projects from initial power-on through product commercialization.
• Demonstrated ability to drive execution across matrixed teams and communicate technical status, risks, dependencies, and corrective actions clearly.
• 15+ years of experience in silicon, systems, hardware, or server product development.
• Experience driving the commercialization of two or more CPU server products, from initial power-on through production release.
• Architecture, design, or validation experience in critical functional domains such as CPU, Fabric, PCIe, CXL, or memory systems.
• Experience optimizing products toward power, performance, and thermal targets.
• Experience with silicon bring-up, validation, debug, characterization, issue triage, and production readiness reviews.
• Experience working with product test organizations, including ATE and SLT.
• Ability to correlate data from characterization, product testing, and sensitivity analysis to formulate theories for observed behaviors and failures; drive actionable plans to complete triage while simultaneously evaluating workarounds and potential fixes.
• Ability to leverage the experience and expertise of specialists across the domains involved in silicon commercialization; make difficult trade-offs among time to market, production readiness, and performance targets; and present executives with concise options and recommendations.
• Proven track record driving execution in hyperscale or data-center server products.

Key Responsibilities

• Develop an intimate understanding of the product’s architecture, design, operating principles, and performance, power, and thermal (PnP) targets. Apply this knowledge to guide post-silicon validation, debug, optimization, and issue resolution.
• Provide technical oversight and guidance for the development of silicon validation plans, ensuring that the plans address product architecture and design intent, functional requirements, PnP targets, and coverage for critical post-silicon risks.
• Work with partner teams to define day-0 and week-by-week execution plans for critical post-silicon milestones, including bring-up, sampling, performance optimization, and production readiness.
• Understand the roles and responsibilities of matrixed teams and establish effective execution mechanisms to ensure clear ownership, timely decisions, and seamless project delivery.
• Drive post-silicon execution, issue triage, and cross-functional problem resolution in partnership with IP and SoC validation teams, software teams, PnP teams, product test teams (ATE and SLT) and Customer Engineering.
• Coordinate prioritization, tracking, and closure of silicon issues, ensuring technical risks, dependencies, and blockers are communicated and resolved in a timely manner.
• Communicate technical status, progress, risks, issues, dependencies, and required actions both upward to leadership and stakeholders and downward to execution teams, ensuring alignment, timely escalation, and effective follow-through.
• Identify gaps in existing processes and influence improvements that strengthen post-silicon execution and help ensure product KPIs and specifications are met.
• Must have strong communication skills and the ability to work effectively in a dynamic environment with senior engineers, technologists, and cross-functional leaders.