CPU Design Verification Engineer

Summary

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

Minimum Qualifications

Minimum BS and 3+ years of relevant industry experience Academic and industry experience with CPU architecture Academic and industry experience with digital logic design, chip architecture and microarchitecture Programming experience in C/C++ or SystemVerilog Experience with developing testplans/testbenches, C-based transactors, and writing/debugging tests

Preferred Qualifications

Bachelor of Science or Engineering in Electrical Engineering, Computer Engineering, or Computer Science Experience in post-silicon bringup Experience with advanced verification techniques such as formal Should be a great teammate with excellent communication skills and be able to work independently on the verification efforts for a block/area of the design

Description

As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: • Work closely with architecture and RTL designers on verifying the functional correctness of the design • Develop test plans and test environments • Develop tests in assembly, C, or vectors according to test plans • Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered • Develop checkers and SystemVerilog or C-base transactors to verify the design