CPU RTL Design Engineer - ASICS Engineering

Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Position corresponds to development of ARM/RISC-V architecture based complex CPU subsystem. Engineer will work in a dynamic and consumer oriented environment where both time to market and quality are extremely important. CPU sub-system design development includes:

• Good knowledge of computer architecture, ASIC design flow and DV methodologies

• Experience in using tools including simulation systems, verdi, and Linting etc.

• Familiar with static timing analysis, CDC, DFT and mbist.

• Excellent communication, interpersonal and teamwork skills

• Good communicator in verbal and writing in English

Preferred Qualifications

• 5+ years of design development experience including U-architecture and RTL development in the following areas

• ARM/MIPS/x86 CPU subsystem micro-architecture and design

• ARM AMBA (CHI/ACE/AXI/AHB/APB) bus specifications

• ARM or RISC-V Architecture for cores and interrupt controller

• L1, L2 or L3 caching schemes

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field.

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