Q

Qualcomm

Designs mobile chips and licenses wireless patents

System Performance Engineer - Multiple Teams

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

  • A deep understanding of NPU, CPU, and DDR architecture internals, including NPU micro-architecture and specialized processing elements for matrix multiplications and convolutions.
  • A strong grasp of deep learning fundamentals, including neural network architectures such as convolutional neural networks, transformers, and generative AI.
  • Understanding the distinction between model training, often done on GPUs, and inference on NPUs.
  • Knowledge of model optimization and compression techniques such as quantization, pruning, and distillation.
  • Knowledge of CPU caches, instruction pipelines, branch prediction, memory hierarchy, and multi-core and multi-threaded processing, including how memory access, instruction dependencies, and shared-resource contention affect performance.
  • Understanding of JEDEC LPDDR4, LPDDR5, and LPDDR6 specifications, command and timing parameters, memory organization, training and initialization sequences, and memory-controller features such as command queues, port arbitration, and control schemes.
  • Familiarity with TensorFlow Lite, PyTorch Mobile, and ONNX Runtime for preparing models for deployment.
  • Experience with NPU-specific compilers such as Qualcomm QNN, Arm Vela, and Intel OpenVINO to optimize and orchestrate AI workloads.
  • Ability to evaluate hardware and software fit for AI tasks and measure metrics such as TOPS/W.
  • Experience using Windows Performance Toolkit and Qualcomm Snapdragon Profiler to analyze and optimize NPU and system-level performance.
  • A core understanding of parallel processing architectures for efficient AI computations.
  • Expertise in operating-system management of processes, threads, memory, memory management units, and interrupt handling, including implications for kernel schedulers and system-level bottlenecks.
  • Good understanding of CPU and DDR benchmarks such as GeekBench, SPECint, CoreMark, lat_mem, stream, and bw_mem, and how they exercise CPU, GPU, and DDR architecture.
  • Experience with performance monitoring tools such as Intel VTune, Linux perf, top, vmstat, iostat, and netstat to monitor CPU, memory, and I/O resources.
  • Experience using software tools to monitor system hotspots and command-bus utilization, identify memory traffic patterns, and validate that software-generated traffic is as expected.
  • Good understanding of memory allocation policies, prefetching, and caching to minimize latency and maximize bandwidth; ability to profile code for memory access patterns and optimize for data locality.
  • Strong statistical skills for analyzing performance-test datasets, including creating transaction-latency histograms and deriving performance metrics.
  • 1 to 5 years of industry experience.
  • Experience working on ARM- or x86-based platforms, mobile, automotive, or data-center operating systems, and/or performance profiling tools.
  • A Bachelor's degree in Computer Engineering and/or Electrical Engineering is required. Minimum qualifications also allow a Bachelor's degree in Engineering, Information Systems, or Computer Science with at least 2 years of Systems Engineering or related work experience; a Master's degree in those fields with at least 1 year of related work experience; or a PhD in those fields.

Responsibilities

  • Drive silicon performance analysis using system and core benchmarks, including NPU, AI/ML, CPU, and memory benchmarks such as Dhrystone, GeekBench, SPECint, and CNN or generative AI networks.
  • Use performance tools to analyze load patterns across IPs and identify system performance bottlenecks.
  • Analyze performance KPIs of SoC subsystems such as NPU, CPU, and memory, and correlate performance with projections.
  • Evaluate and characterize performance at various junction temperatures and optimize operation at high ambient temperatures.
  • Analyze and optimize SoC infrastructure performance parameters such as NoC and LPDDR5.
  • Collaborate with cross-functional global teams to plan and execute chipset performance activities and make recommendations for next-generation chipsets.

Desired Qualifications

  • Experience in application or driver development in Linux or QNX and ability to create or customize makefiles with compiler options.
  • Knowledge of computer architecture, LPDDR5 DDR, and bus or NoC profiling.
  • Knowledge of operating-system fundamentals such as Linux, QNX, or hypervisors, and experience working on data-center applications.
  • Experience creating professional-quality reports and slides using Microsoft Office or advanced visualization tools.
  • Experience in proof-of-concept development and competitive analysis.
  • Knowledge of voltage, power, or thermal domains.
  • A Master's degree in Computer Engineering and/or Electrical Engineering.

About the Company

Qualcomm

Designs mobile chips and licenses wireless patents

Qualcomm designs the Snapdragon processors and modems inside many Android phones, and it licenses its wireless patents to device makers around the world. It helped commercialize CDMA, the cellular technology behind 3G networks, and its patents cover core parts of the 4G and 5G standards that phones use to connect. The company does not run its own chip factories; contract foundries make its chips, which it sells to makers of phones, PCs, cars, and connected devices. Device makers also pay Qualcomm royalties for using its patented technology, which forms a second business alongside chip sales. Qualcomm was founded in 1985 and is based in San Diego, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Diego, CA
Founded
1985

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