SoC Power Analysis and Optimization Engineer

Summary

As part of our Silicon Engineering group, you will take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you will help design products that bring to our customers experiences they’ve never before envisioned. In this highly visible role, you will be responsible for SOC simulation, optimization and modeling.

Minimum Qualifications

A minimum of a bachelor's degree in relevant field and a minimum of 10 years of relevant industry experience.

Preferred Qualifications

Familiarity with ASIC power analysis and optimization Familiarity with machine learning algorithms and programming Familiarity with Verilog and System Verilog. Familiarity with SOC design flow and methodology Familiarity with scripting in Python. Familiarity computer architecture, logic and circuits design Familiarity signal processing is a plus Silicon power measurement experience is a plus SOC power modeling, low power design and power optimization experience is a plus Strong communication skills are a pre-requisite as the candidate will interface with a lot of different groups

Description

The main responsibility of this role is to drive the SOC power simulation, optimization and modeling. • Work with cross functional teams, including architecture, RTL and physical design teams, to determine the interesting use-cases to simulate power, to provide power projections and targets for the future projects, and to improving the SOC power efficiency • Working with SOC power team members to drive power analysis and optimization tasks, improving the efficiency with automation and GenAI/LLM approaches. • Explore new methodology to analyze the power data, create power metrics to identify the optimization opportunities, drive automated approach to improve SOC power efficiency across IPs • Collaborate cross-functional teams to deploy the power optimization to improve SOC power, review results, improve the methodology on efficiency, runtime, and support boarder scope of designs.