Product Validation Intern
Cadence Design Systems
Product Validation Intern
Cadence Design Systems
Develops EDA software, IP, verification tools
The Position Description are:
a) Assist in Cadence hierarchical solution area development and validation.
b) Validate and maintain comprehensive hierarchical solution unit and flow test cases for Innovus Digital Implementation System.
c) Develop test suites of the new features of hierarchical functional/flow solution.
The Position Requirements are:
a) MS in microelectronics, EE and related majors.
b) Digital IC design knowledge is necessary, statistic timing analysis knowledge is a strong plus.
c) Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus.
d) Good communication in English and Chinese, good confidence and self-motivation.
**Prefer to work 3-4 days per week for 6+ months.
Develops EDA software, IP, verification tools
Cadence Design Systems supplies software, hardware, and IP for electronic design automation (EDA) to help customers create advanced semiconductor chips and electronic systems. Its tools handle system design, verification, digital and analog IC design, and custom flows, while IP such as Tensilica processors and DSP cores can be licensed for integration into customer products. The offerings are delivered as software licenses with maintenance and support, plus IP licensing and occasional hardware-accelerated options. The company differentiates itself with a broad, end-to-end EDA portfolio and close collaboration with industry leaders to streamline the path from concept to silicon, aiming to help customers bring sophisticated silicon and electronics to market faster with lower risk and higher productivity.
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